Assembly debug
Hello All,
I'm new to assembly and I am stumped on a problem I'm having! I'm trying to write a bare-bones spi routine for and ADC (AD7323) a I believe the problem is with the program not looping. What has me really confused is that when I debug the program with PSAD and just let it run without breakpoints, the routine seems to work just fine (I checked the chip's data output, and the clock signal going into the chip with an oscilloscope and I see consistent, regular pin activity). However, when I run it without PSAD, I only see a very quick pulse on scope and then no pin activity which has led me to think that the program ran through the code but did not loop.
I'm guessing there's some bone-headed thing I'm missing here that more experienced eyes will catch!
Thanks for the help,
Here's my assembly code in an object that I writing:
I'm new to assembly and I am stumped on a problem I'm having! I'm trying to write a bare-bones spi routine for and ADC (AD7323) a I believe the problem is with the program not looping. What has me really confused is that when I debug the program with PSAD and just let it run without breakpoints, the routine seems to work just fine (I checked the chip's data output, and the clock signal going into the chip with an oscilloscope and I see consistent, regular pin activity). However, when I run it without PSAD, I only see a very quick pulse on scope and then no pin activity which has led me to think that the program ran through the code but did not loop.
I'm guessing there's some bone-headed thing I'm missing here that more experienced eyes will catch!
Thanks for the help,
Here's my assembly code in an object that I writing:
''
'' ASSEMBLY SHIFT IN PROTOTYPE
'' FOR AD7323
'' VER. 1
'' Robert Valtierra
'' FEB. 13 2011
''
VAR
long Cog
PUB START(SAMPLE)
Cog := cognew(@entry, @SAMPLE) + 1
PUB STOP
if Cog
cogstop(Cog~ - 1)
DAT
org 0
entry
mov Addr, par ' Copy "Sample" address to Addr
muxnz dira,DAT_CLK ' Configure DAT_CLK and CS as outputs (1)
muxnz dira,CS
muxnz outa,CS
muxnz outa,DAT_Clk ' Set DAT_Clk and CS initially high
SHIFT_IN mov count,N_Bits ' Set counter to number of sample bits
muxz outa,CS
SHIFT_LOOP test D_in,ina wc ' Test if data pin is high or low, write carry if high
rcl TEMP1,#1 ' Shift in carry flag one to the left
muxz outa,DAT_CLK ' Cycle clock low
muxnz outa,DAT_CLK ' Cycle clock high
djnz count,#SHIFT_LOOP ' Decrement count, loop if not zero
muxnz outa,CS ' De-trigger Chip Select
shl TEMP1, STP1 '
mov TEMP2, TEMP1
and TEMP2, CLRB ' Throw out first four bits and multiply by 16 using shift lest
shr TEMP1, STP2 ' Convert to "little-endian"
shl TEMP2, STP2
or TEMP1, TEMP2
wrword TEMP1, Addr ' write TEMP value to address of global var "Sample"
mov TEMP1, #0 ' clear temp variables
mov TEMP2, #0
jmp #SHIFT_IN ' loop back to SHIFT_IN
'
' VARIABLES, PARAMETERS
'
STP1 long $0000_0004
STP2 long $0000_0008
CLRB long $0000_00FF
DAT_CLK long $0020_0000 ' Pin 21 assigned to clock pin
CS long $0002_0000 ' Pin 17 chip select
D_in long $0010_0000 ' Pin 20 Data in
TEMP1 long 0 ' Temporary shift in variable
TEMP2 long 0 ' Temporary shift in variable
N_Bits long 16 ' Number of sample bits
count long 0 ' Shift in loop counter
Addr res 1
fit
Comments
The other problem is that you are using MUXZ and MUXNZ, where you probably really want to use ANDN and OR. MUXZ and MUXNZ depend on the zerio flag.
Edit: I thought about the MUXZ and MUXNZ a bit more, and that would work if the zero flag is guaranteed to be zero at the beginning. I don't know if that's a valid assumption or not.
The Sample address was an issue, but not the cause of the lack of pin activity (Thanks for catching that before I had to deal with the frustration of of having a working chip but no data!) Turns out that it was indeed an issue of setting the pin addresses properly.
Thanks again!
did u ever get your "bare bones routine " working?
I could use it, since I would like to use the same IC...the AD7323.
Best regards.