Propeller II update - BLOG
As an ongoing effort to keep our customers in the loop with current updates with Propeller II and other projects, I have decided to start a blog that shows video sections of Propeller II layout that I'm currently working on.
There is no audio... well, some of it may have audio, other than a brief text description of what the layout block is. This method has a minimal impact on productivity, because I can push a record button and forget about it, and besides, there are times you wouldn't want to hear me mumble. :-)
Feel free to ask questions and make comments to the video section.
Propeller II updates:
-> Currently we are scheduled for Early November 2010 tape out for a test chip!! This is a significant milestone and will help us determine from empirical testing if we need to make any changes before the final Chip.
-> So the question begs... "When is the final Chip coming?" ... I know better than to put any numbers here, but a little insight might help. Here is a little bit of a perspective as to why it takes so long for this process to take place.
When I was at National Semiconductor we usually had a layout and design team of 20 or so individuals for any given project and roughly the design would take about a year from start to finish. Compared to Parallax not taking into consideration that the design itself goes through a series of changes (even after layout has been placed <- Yes, this means you just rip it all up and start over in some cases), as far as our layout and design team is concerned we are a 2 man team between Chip (design) and myself (layout).
I've been with Parallax for 5 years and when I started layout at Parallax I had a blank screen, completely black. We had to design our own standard cells ... AND,OR,NOR,NAND,XOR, etc... not only once, but twice one for each voltage level we had in our design (1.8V and 3.3V). The design rule deck also needed to be incorporated into the layout tool that started out as a PDF file (paper version).
So ok, what am I trying to say? ... if it takes roughly 1 year with a design team of 20 (about 41k man hours), we are ahead of schedule at 5 years out with a design team of 2 individuals (about 21k man hours). That's NOT to say that it will take another 5 years by any means, fortunately we have the luxury of not having 'too many cooks in the kitchen', but realistically we could be looking at this time next year.
Hope you enjoy the videos!
Metal slots on corner cell
Modifying an (Input) I/O for the Test Chip
Modifying an (Output) I/O for the Test Chip
General Floor Plan Outline with audio
ECO Change on resistor type from N+Poly to P+Poly with audio
How to find that DRC error with audio
Fuse structure, buried under several layers of metal with audio
Test Die Wiring
Test Die Wiring (some more)
How to swap 32 wires in 5 min