40 Props in a Skyscraper
40-Prop SkyScraper Computing Machine
UltraSpark 40 - SuperMicrocontroller
A Propeller project with 40 prop chips providing 320 RISC computers
with 1,280 ports and 6,400 to 8,320 MIPS speed.
(demonstration of basic principles to take some characteristics of a supercomputer, in particular the notion of larger multiples of relatively simple processors communicating over a common bus, each doing a portion of a task in parallel)
This is a simple hobby project designed for pure fun and enjoyment! It may be the most fun project I've ever worked on (cool toy). I only started with the prop about 2 months ago. Thanks to everyone on the forum who posted helpful comments as I learned more SPIN and elements of assembler code. Also thanks to those addicted prop-heads who convinced me to take a look at the Propeller chip. I took a look and this is what happened. It's all your fault!
Humanoido
EDIT: the US40 has become a much more massive project taking several turns of development. It is being used primarily now for Academics. Additional posts underscore continuing developments.
Photo montage shows various views of a simple multiple Propeller chip ongoing project. It will morph into various configurations as new circuits are tested.
Price & Disclaimer
This is a pure hobby project for my personal enjoyment and use only, and is not for sale. If the project does not satisfy your requirements, keep in mind that it was not intended to do so. This is not a product, and the descriptions are offered as is, in whatever degree or lack of degree of completeness for your inspiration and ideas. Good luck!
Form Factor
The UltraSpark 40 easily fits onto a desktop with its small form factor. The space between the Proto Boards is reduced using smaller 5/8-inch spacers. For size comparison, the IBM ThinkPad is the black object under the SkyScraper.
SkyScraper (Tower)
The first Skyscraper took on this shape using 20 Parallax Proto Boards and nylon spacers to achieve a minimal 5/8" board-to-board spacing. Spacing is determined by the vertical height of the board's 1000uF electrolytic capacitor. The SkyScraper has three sides of the board supported. The open end allows more easy routing of wires and cables (not shown in these early pics).
UltraSpark 40 Specifications
40 Props DIP Mix with SMT, Model Number: P8X32A-D40
320 Tiny RISC Computers
Processor/cog/small risc computer Per Chip: Eight
Architecture: 32-bits
Math: Integer and Floating Point
Standard System Clock Speed: DC to 80 MHz
Overclocked to 100MHz
Global RAM/ROM: 40x64 K bytes; 40x32 KRAM / 40x32 KROM
Cog RAM: 512 x 32 bits each x 320 cogs
1,280 ports
640 Counters
20 Dual Expanded Proto Boards with SMT Props
20 Socketed Prop DIPs
Hypered Stack Configuration
Socket Twins Concept
6.4 Billion IPS Standard (Instructions Per Second)
(40 props * 8 cogs * 20 mips = 6,400 MIPS, 6.4BIPS ~= 64MFLOPS)
8.32 Billion IPS Overclocked
(40 x 8 cogs x 26 mips = 8,320 MIPS. 8.32 BIPS ~= 83.2MFLOPS)
Computer Programming Languages approaching 200
Open Ambient or Compressor Cooling
Tiny Parallel Architecture
Computing Array: Parallel Clustering
IEX Technology Endowed
Ext PS Enabled
EEPROMs for Programming, Indexing
Reconfigurable Whole Cubes up to 6 x 6 x 6
Video 3.5-inch TFT LCD AV 4:3 Panel NTSC/PAL 320 x 240 Pixels 12V 3.5W
Terminals
Prop Terminal + special version of FemtoBASIC
Emulation
Emulators: TV, Mouse, and Keyboard
Compatibility/Expansion
Currently an interest has developed in parallel and various algorithms which has led to some very interesting experiments and results.
Software & Wiring Criteria
Software Download
Current software is available and can be downloaded at the Parallax Propeller OBEX. The UltraSpark 40 is a flexible machine and not confined to one design. However, if you want to duplicate the first fundamental design, most of the single wire serial interface drivers will work.
Schematic Download
The schematic that I used is the same as the BASIC Stamp Supercomputer and can be downloaded at that thread. A modification to the value of the resistor may be needed.
Hardware
The first setup included a wire bus in Daisy Chain mode that threaded all of the prop boards through pin 0 and the twin prop. Wire wrap technology is used because the twin prop can be removed and the board will be available for other configurations and recycling into larger projects. A front end prop experiment (one HYDRA) provides TV, Keyboard, game controllers, VGA, mouse, and numerous more capability.
Concept
There are two concepts for communicating internally - 1) the Master/Slave technique and 2) the deterministic approach. More information and examples are provided in the Handbook of BASIC Stamp Supercomputers. The BASIC Stamp Supercomputer uses the Master/Slave approach while the SEED Stamp Supercomputer uses Tiny AI. The UltraSpark 40 can run programs with either approach although different deterministic methods are used for the latter.
Photos & Wires
From a time standpoint, the first pics were taken immediately after the SkyScraper stack was built. This is different from the BASIC Stamp Supercomputer project that had hundreds or thousands of wires protruding. The first UltraSpark 40 design is much more lean and intentionally wired as compact as possible. At higher frequencies there is a consideration to keep wires shortened, and minimal. With overclocking and 100MHz frequencies, such wiring efficiency becomes more important.
Overclocking
I'm experimenting with overclocking and have some very good results. I've found that use of solderless breadboards is possible if the clock is not raised over 100 MHz. Wires need to be kept non looping and minimal length with proper gauge selected. Overclocking raises the current consumption dramatically. Be prepared to use a power supply that can handle the increased amps. If machines are built massively bigger than the UltraSpark 40 with overclocking, they may need to tap into adjacent rooms for power, like a kitchen and a living room for example.
Cryogenic SuperCooling
There's ongoing research and some experiments being developed for supercooling to around dry ice temperatures. Peltier devices are favored though other methods are being tested. More equipment is needed to make this self running. The Cryogenic chamber can be approximately the same as that of the ST4 Astronomical CCD Super Cooled Imaging camera sensor chip. Grouping chips and enlarging the chamber will benefit future designs. I may introduce Virtual CCD Cooling concepts across the Propeller chip.
Color Coding
Colored wire is coded throughout so if a wire falls off, it can easily be remedied by color grouping techniques.
Mixing Art & Science
As some have pointed out, projects may appear have a degree mix of art and science. It may be the way the photos are composed or the construction style of the device, or the way that it can be re-purposed. It's perfectly valid to style your projects by morphing together art and science.
Predecessor Machines
There are at least sixteen machines built before the UltraSpark 40. Each of these machines was utilized to test functions and lay the groundwork for a larger machine. Each project was recycled into the next larger machine. The list will be updated with historical data in a future post.
It is with great honor that we have comments from Forest Godfrey, a man who has worked on building the world's fastest Jaguar Supercomputer.
http://forums.parallax.com/showthread.php?t=125674&page=2
I like the "supermicrocontroller" name to describe Humanoido's tower. It's phenomenal at doing the things microcontrollers do well: controlling GPIO pins, talking low-level hardware protocols, controlling screens, etc. If your goal is to create a cool piece of microcontroller hardware that nobody else has and can control massive amounts of I/O, the Prop Tower is pretty darn sweet. I've been working to get us to use a Prop in our control paths. Forest Godfrey
Humanoido
UltraSpark 40 - SuperMicrocontroller
A Propeller project with 40 prop chips providing 320 RISC computers
with 1,280 ports and 6,400 to 8,320 MIPS speed.
(demonstration of basic principles to take some characteristics of a supercomputer, in particular the notion of larger multiples of relatively simple processors communicating over a common bus, each doing a portion of a task in parallel)
This is a simple hobby project designed for pure fun and enjoyment! It may be the most fun project I've ever worked on (cool toy). I only started with the prop about 2 months ago. Thanks to everyone on the forum who posted helpful comments as I learned more SPIN and elements of assembler code. Also thanks to those addicted prop-heads who convinced me to take a look at the Propeller chip. I took a look and this is what happened. It's all your fault!
HumanoidoEDIT: the US40 has become a much more massive project taking several turns of development. It is being used primarily now for Academics. Additional posts underscore continuing developments.
Photo montage shows various views of a simple multiple Propeller chip ongoing project. It will morph into various configurations as new circuits are tested.
Price & Disclaimer
This is a pure hobby project for my personal enjoyment and use only, and is not for sale. If the project does not satisfy your requirements, keep in mind that it was not intended to do so. This is not a product, and the descriptions are offered as is, in whatever degree or lack of degree of completeness for your inspiration and ideas. Good luck!
Form Factor
The UltraSpark 40 easily fits onto a desktop with its small form factor. The space between the Proto Boards is reduced using smaller 5/8-inch spacers. For size comparison, the IBM ThinkPad is the black object under the SkyScraper.
SkyScraper (Tower)
The first Skyscraper took on this shape using 20 Parallax Proto Boards and nylon spacers to achieve a minimal 5/8" board-to-board spacing. Spacing is determined by the vertical height of the board's 1000uF electrolytic capacitor. The SkyScraper has three sides of the board supported. The open end allows more easy routing of wires and cables (not shown in these early pics).
UltraSpark 40 Specifications
40 Props DIP Mix with SMT, Model Number: P8X32A-D40
320 Tiny RISC Computers
Processor/cog/small risc computer Per Chip: Eight
Architecture: 32-bits
Math: Integer and Floating Point
Standard System Clock Speed: DC to 80 MHz
Overclocked to 100MHz
Global RAM/ROM: 40x64 K bytes; 40x32 KRAM / 40x32 KROM
Cog RAM: 512 x 32 bits each x 320 cogs
1,280 ports
640 Counters
20 Dual Expanded Proto Boards with SMT Props
20 Socketed Prop DIPs
Hypered Stack Configuration
Socket Twins Concept
6.4 Billion IPS Standard (Instructions Per Second)
(40 props * 8 cogs * 20 mips = 6,400 MIPS, 6.4BIPS ~= 64MFLOPS)
8.32 Billion IPS Overclocked
(40 x 8 cogs x 26 mips = 8,320 MIPS. 8.32 BIPS ~= 83.2MFLOPS)
Computer Programming Languages approaching 200
Open Ambient or Compressor Cooling
Tiny Parallel Architecture
Computing Array: Parallel Clustering
IEX Technology Endowed
Ext PS Enabled
EEPROMs for Programming, Indexing
Reconfigurable Whole Cubes up to 6 x 6 x 6
Video 3.5-inch TFT LCD AV 4:3 Panel NTSC/PAL 320 x 240 Pixels 12V 3.5W
Terminals
Prop Terminal + special version of FemtoBASIC
Emulation
Emulators: TV, Mouse, and Keyboard
Compatibility/Expansion
- HW Proto Boards
- HW HYDRA
- HW Propeller Demo Board
- SW Prop Terminal (virtual keyboard, TV, mouse & keyboard)
- SW Digital Storage Scope
- OIT (Optics Interface Transceiver)
- P-BUS (Prop BUS)
- DEEPROM (Dual-EEPROMs)
- FLEXPANDABLE (upward mobility path)
- SIGNAL ROAMER (not confined to boards)
- SKYSCRAPER Expanding F1, F2, F3 ... or B1, B2, B3 ...
- Multi-Interface MINT encompasses the chip to chip communications
- Circuits for downloading one program into all the props (bootloader)
- Path for maintaining 'across the Skyscraper' critical timing
- Special oscillator to handle all mult props
- Nominal RFI/EMI blanket shield
- Hobby only (fun)
- Pure Academics
- Robots, Robot Control, Sensors
- Education, Schools, Students, Educators
- Tiny & Simple Parallelism Exampling
- running benchmarks
- new programming
- developing new parallel programming languages
- developing & testing new circuits
- running many different programming languages
- new experiments
- exploring capability of 320 little computers running at the same time
- developing new apps
- robot brain
- testing
- multi-games
- pushing the limits
- testing and developing a small neural net
- solving codes
Currently an interest has developed in parallel and various algorithms which has led to some very interesting experiments and results.
Software & Wiring Criteria
- Wiring is simplified
- Wiring is easily changeable
- Speed is maximized for the interface used
- Interface facilitates loading all props at the same time
- Interface handles frequency synchronization
- Code handles identifications
- Minimal power consumption is implemented
- Interface is compliant with parallel programming and code
- Wiring Real Estate Provided
- Parts/Circuits are green configured
Software Download
Current software is available and can be downloaded at the Parallax Propeller OBEX. The UltraSpark 40 is a flexible machine and not confined to one design. However, if you want to duplicate the first fundamental design, most of the single wire serial interface drivers will work.
Schematic Download
The schematic that I used is the same as the BASIC Stamp Supercomputer and can be downloaded at that thread. A modification to the value of the resistor may be needed.
Hardware
The first setup included a wire bus in Daisy Chain mode that threaded all of the prop boards through pin 0 and the twin prop. Wire wrap technology is used because the twin prop can be removed and the board will be available for other configurations and recycling into larger projects. A front end prop experiment (one HYDRA) provides TV, Keyboard, game controllers, VGA, mouse, and numerous more capability.
Concept
There are two concepts for communicating internally - 1) the Master/Slave technique and 2) the deterministic approach. More information and examples are provided in the Handbook of BASIC Stamp Supercomputers. The BASIC Stamp Supercomputer uses the Master/Slave approach while the SEED Stamp Supercomputer uses Tiny AI. The UltraSpark 40 can run programs with either approach although different deterministic methods are used for the latter.
Photos & Wires
From a time standpoint, the first pics were taken immediately after the SkyScraper stack was built. This is different from the BASIC Stamp Supercomputer project that had hundreds or thousands of wires protruding. The first UltraSpark 40 design is much more lean and intentionally wired as compact as possible. At higher frequencies there is a consideration to keep wires shortened, and minimal. With overclocking and 100MHz frequencies, such wiring efficiency becomes more important.
Overclocking
I'm experimenting with overclocking and have some very good results. I've found that use of solderless breadboards is possible if the clock is not raised over 100 MHz. Wires need to be kept non looping and minimal length with proper gauge selected. Overclocking raises the current consumption dramatically. Be prepared to use a power supply that can handle the increased amps. If machines are built massively bigger than the UltraSpark 40 with overclocking, they may need to tap into adjacent rooms for power, like a kitchen and a living room for example.
Cryogenic SuperCooling
There's ongoing research and some experiments being developed for supercooling to around dry ice temperatures. Peltier devices are favored though other methods are being tested. More equipment is needed to make this self running. The Cryogenic chamber can be approximately the same as that of the ST4 Astronomical CCD Super Cooled Imaging camera sensor chip. Grouping chips and enlarging the chamber will benefit future designs. I may introduce Virtual CCD Cooling concepts across the Propeller chip.
Color Coding
Colored wire is coded throughout so if a wire falls off, it can easily be remedied by color grouping techniques.
Mixing Art & Science
As some have pointed out, projects may appear have a degree mix of art and science. It may be the way the photos are composed or the construction style of the device, or the way that it can be re-purposed. It's perfectly valid to style your projects by morphing together art and science.
Predecessor Machines
There are at least sixteen machines built before the UltraSpark 40. Each of these machines was utilized to test functions and lay the groundwork for a larger machine. Each project was recycled into the next larger machine. The list will be updated with historical data in a future post.
- Demo Board for confirmation
- HYDRA front end for mouse, keyboard, TV, VGA
- PEK 1 prop on breadboard
- 2-Prop-Experiment 2 props, 1 PEK, 1 on same breadboard
- Spark 2 2 props, 1 Proto Board, one in parallel, recycled for Spark 4
- PIGGY-TWINS 2 props, one piggybacked on another
- Dueling Breadboards 2 props, one on ea., f/interface tests
- Spark 4 Tiny Tim 4 props 2 proto bds w/2 props on ea
- Spark 5 5 props, 5 stacked proto boards, Spark 6 forerunner
- Spark 6 6 props 3 proto boards 2 props on ea board, led to Spark 8
- Spark 8, Tertiary ADJUNCT 8 props 4 proto boards w/2 props on ea
- Propalot - 10 props on solderless breadboard, led to Spark 10
- Spark 10, 10 props 5 protos 10 props total, Twelvenator forerunner
- Twelvenator aka Board of Twelve, 12 props, green board
- UltraSpark 15 15 props, interrupted stack Proto Boards
- Tertiary 20 20 props, 15 proto boards stacked 5 props, photos
- UltraSpark 20 20 props stacked, photos
- MLEPS 25 props, boards/breadboards, stripped for UltraSpark 40
- Banking experiments
- Loading techniques
- New inventions (BIN)
- PWR management
- Horizontal forms
- Adjunctive considerations
- Forms of communication using LEDs (cheap)
- Exploring advantages of FP processing and analysis
- BUS expansion
- Additional designs with COUNTERs
- Chunk space signaling
- How a neuron can be implemented
- Recycling
- Floating Point
- Hybrid Integer and FP Mode
- Addtl. Processor Functions
- Addtl. States in Trinary
- Speed Test
- Languages
It is with great honor that we have comments from Forest Godfrey, a man who has worked on building the world's fastest Jaguar Supercomputer.
http://forums.parallax.com/showthread.php?t=125674&page=2
I like the "supermicrocontroller" name to describe Humanoido's tower. It's phenomenal at doing the things microcontrollers do well: controlling GPIO pins, talking low-level hardware protocols, controlling screens, etc. If your goal is to create a cool piece of microcontroller hardware that nobody else has and can control massive amounts of I/O, the Prop Tower is pretty darn sweet. I've been working to get us to use a Prop in our control paths. Forest Godfrey
Humanoido
698 x 374 - 36K
Comments
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90 * 2 = Pi
Post Edited (humanoido) : 7/13/2010 7:49:26 PM GMT
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90 * 2 = Pi
One correction:
40 props * 8 cogs * 20 mips = 6,400 MIPS
GFLOPS refers to floating point operations, not integer ops.
Don't worry, 6.4BIPS (billion instructions per second) is still VERY impressive!
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www.mikronauts.com E-mail: mikronauts _at_ gmail _dot_ com
My products: Morpheus / Mem+ / PropCade / FlexMem / VMCOG / Propteus / Proteus / SerPlug
and 6.250MHz Crystals to run Propellers at 100MHz & 5.0" OEM TFT VGA LCD modules
Las - Large model assembler Largos - upcoming nano operating system
Looks cool.
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There are 10 types of people in the world: those who understand binary, and those who don't
That's a lot of LEDs for example.
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For me, the past is not over yet.
As many will know OCCAM was specifically designed for multi-processor machines with non-shared memory and channel communications.
These guys from my old university transterpreter.org/ have now designed a virtual machine that allows Occam programs to be compiled to bytecodes, like Java. They even have this running on Lego Mindstorms, so why not the Prop?
I feel another Prop interpreter project coming on.
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For me, the past is not over yet.
I was just looking at the OCCAM and LINDA parallel extensions to forth at http://www.ultratechnology.com/4thpar.html
This ultra spark 40 looks like its made for parallel forth; but being a forth guy, I suppose I'm like the guy with a hammer that thinks everything looks like a nail.
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There are 10 types of people in the world: those who understand binary, and those who don't
en.wikipedia.org/wiki/Parallel_processing
searchdatacenter.techtarget.com/sDefinition/0,,sid80_gci212747,00.html
www.wisegeek.com/what-is-parallel-processing.htm
"If a busy shopping mall has got only a single cash counter, the customers will form a single queue, and wait for their turn. If there are two cash counters, the task can be effectively split. The customers will form two queues and will be served twice as fast. This is an instance in which parallel processing is an effective solution.
With the help of parallel processing, highly complicated scientific problems that are otherwise extremely difficult to solve can be solved effectively. Parallel computing can be effectively used for tasks that involve a large number of calculations, have time constraints and can be divided into a number of smaller tasks.
Parallel processing is particularly beneficial in areas such as weather and climate, chemical and nuclear reactions, oil exploration, measuring seismic data, space technology, electronic circuits, human genome, medicine, advanced graphics and virtual reality, and manufacturing processes.
In all likelihood, parallelism is the future of computing. On the whole, successful implementation of parallel computing involves two challenges:
* Tasks should be structured in such a manner that they can be executed at the same time
* The sequence of tasks which must be executed one after the other should be maintained"
prof_braino: This is a great find! The link gives the source code. We have PropFORTH by Sal Sanci, PROPELLERFORTH by CLIFFE BIFFLE, PROPELLERFORTH Interactive ANS-subset Forth for the Parallax Propeller microcontroller.VERSION for Parallax HYDRA pf801-hydra.binary v8.01 for HYDRA (bugfix release) Jan 2008 10.0 KB, JDFORTH - FORTH to SPIN Compiler by Carl Jacobs, Forth - UNIFORTH, Forth 83 Version 2.1.0 and SPIN FORTH by SAL SANCI.
Post Edited (humanoido) : 7/13/2010 7:25:40 PM GMT
I was thinking of realtime finite difference time domain processing of mri data
http://en.wikipedia.org/wiki/Finite-difference_time-domain_method
I think it would be easy to implement the forth "extra stack" for advanced math for the matrices. Also 32 bit integer math might be sufficient, although I don't know what the data looks like. That just leaves formatting the data stream. But I don't know about such things, I'll have to find somebody smart to ask about this.
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There are 10 types of people in the world: those who understand binary, and those who don't
So how do you manage parallel processing and communication among the physical stack of props? (Now I have to be careful, I think of the stack as the cpu's internal hardware stack. What is the correct term to talk about the collection of prop chips mounted on board and the boards assembled in a tower? The Tower?) So how do you manage parallel processing and communication among the physical Tower?
If you have something special coded already, I would not want to duplicate your work. But if you don't have the software management infrastructure established I would be interested in looking into a parallel forth implementation using the current propforth and the FORTH-LINDA stuff on the previous link. One could then add some simple extensions to the FORTH to make it compatible with whatever language you choose.
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There are 10 types of people in the world: those who understand binary, and those who don't
Post Edited (humanoido) : 7/13/2010 8:21:41 PM GMT
Here's an example of how a parallel processing machine can make a robot more intelligent.
http://forums.parallax.com/showthread.php?p=922262
It can potentially do over 300 things at the same time (such as managing sensors, vision, motion, hearing, tactile, mechanical gripper, computational, etc.)
The Smartest BoeBot has
a really big onboard brain.
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humanoido
*Stamp SEED Supercomputer *Basic Stamp Supercomputer *TriCore Stamp Supercomputer
*Minuscule Stamp Supercomputer *Tiny Stamp Supercomputer *Penguin with 12 Brains
*BASIC Stamp Supercomputing Book *Three Dimensional Computer *StampOne News!
*Penguin Tech *Penguin Robot Society *Humanoid Toddler Robot
*Ultimate List Prop Languages *Prop-a-Lot *Propalot Stuff *Prop SC Computer
*Prop Super Mini Computing Machine *Hobby Space Program *Smartest BoeBot at
http://forums.parallax.com/forums/default.aspx?f=6&m=469004
Post Edited (humanoido) : 7/14/2010 10:06:46 AM GMT
Floating point is implemented as PASM code on the prop, and is on the order of 20x-100x slower than integer code.
Actually even integer multiplication and division has to be implemented as pasm code [noparse]:)[/noparse]
Still, 6.4BIPS ~= 64MFLOPS - still quire respectable (look up early super computers such as a VAX as proof)
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www.mikronauts.com E-mail: mikronauts _at_ gmail _dot_ com
My products: Morpheus / Mem+ / PropCade / FlexMem / VMCOG / Propteus / Proteus / SerPlug
and 6.250MHz Crystals to run Propellers at 100MHz & 5.0" OEM TFT VGA LCD modules
Las - Large model assembler Largos - upcoming nano operating system
If we compare to the CDC 7600... en.wikipedia.org/wiki/CDC_7600
'The CDC 7600 was the Seymour Cray-designed successor to the CDC 6600, extending Control Data's dominance of the supercomputer field into the 1970s. The 7600 had a 27.5 ns clock cycle and a 65 Kword primary memory using core and variable-size (up to 512 Kword) secondary memory (depending on site). It was generally about ten times as fast as the CDC 6600, and could deliver about 10 MFLOPS on hand-compiled code, with a peak of 36 MFLOPS. When the system was released in 1969, it carried a price tag around $5 million, more as options and features were added.'
Post Edited (humanoido) : 7/16/2010 8:44:16 AM GMT
Many of these terms are adapted from The Handbook of BASIC Stamp Supercomputing.
www.p-robot.com/index.php/handbook-of-basic-stamp-supercomputing.html
http://forums.parallax.com/showthread.php?p=841541
The completed Tower is called a Skyscraper.
The Skyscraper has many Levels made up of Boards.
Levels may have a physical Address.
The complete aggregate of levels may be called the Stack (not to be confused with a computer stack).
Boards are Propeller Proto Boards.
The topmost level is called the Crown.
The bottom level is called the Base.
An enclosure around a level is a Cage.
The amount of space on a board is Real Estate.
The space surrounding a chip is Personal Space.
A Propeller IC is also called a prop, or chip.
A Propeller or Prop Chip has Cores, Cogs, or Tiny RISC Computers.
Two prop chips on one Proto Board are Twins.
A chip may have an ID, Identification Number or Sequence, or Enumeration.
Chips may be Self Enumerating.
The distance between levels is determined by Spacers.
A Control Panel holds controls, switches, monitor, display, keyboard, lights, indicators.
The Control Panel has a Face or Faceplate.
BSTAT is a wireless base station external to the UltraSpark 40.
A Banner is the identification label for name, version, info.
The entire unit is called a Machine, Collective or Hive.
It is also a Prop Super Mini Computing Machine.
The code name, or development name is the UltraSpark 40.
Wiring 2x2 or 2x3 is called a Cube or Cube Matrix.
Parallel processing and communication is managed with the Interface.
The interface is also a Network of many computers.
Wiring arranges in Hyperspace or a Hypercube without changing physical locations.
Computing is referred to as Parallel Processing.
Special programming is a Parallel Algorithm.
External add-on machines are Adjuncts.
Working with Adjuncts is "Adjunctive Processing."
The terminology for Skyscraper levels is the same
as the floors signature in an elevator. Ground floor is L1
and progresses upward L2, L3 ...
while levels below ground floor are B1, B2, B3 ...
Post Edited (Humanoido) : 7/26/2010 6:06:40 AM GMT
The second question I have is about using a different connection net. The machine has 20 prop proto boards with an initial 20 props. An additional 20 props are added, one extra per board. It's easy to connect these to the network. But how about a consideration in using the second prop as a slave to the first, in a kind of coprocessor fashion? It would take its directions through the twenty masters located on the boards. So 20 props would load with the main program and those 20 props in turn would load up 20 more props depending on the program and problem to be solved. Could this could use Chip Gracey's Obex program for one prop loading another prop? What are the advantages or shortcomings? How would this be adapted to Parallel Processing?
humanoido
Post Edited (humanoido) : 7/16/2010 9:15:14 AM GMT
http://forums.parallax.com/showthread.php?p=922262
humanoido
One of the really *special* capabilities in the prop are the HW counters. Your Skyscraper has 640 of them.
So an interesting experimental use of your Prop Skyscraper may be Video processing. You could use an external synch separator as a trigger and then use the counters on each cog with a different incrimental offset to capture a small chunk of data. Effectively each would be looking at a different point of the same datastream. So that may tie up one I/O line per Prop for reading the data stream, not sure what you'd do with the others.... maybe drive leds for the output summary of the part of the datastream they are reading. Could be interesting.
Certainly lots of interesting applications should you be able to coordinate them.
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It's all a function of time.
Counters
and D/A conversion, 129
and PWM with NCO modes, 156
CTRA/B Register Map, 124
CTRMODE bit field, 124
Differential DUTY mode, 133
differential PLL mode, 166
DUTY modes, 129
Infrared detection, 147
metal detection with PLL and POS detector modes, 171
NCO mode and IR detection, 150
NCO modes, 137
NEGEDGE detector mode, 170
NEGEDGE modes, 153
PLL internal mode for video, 166
PLL modes, 166
POS detector modes, 123
POSEDGE modes, 153
single-ended DUTY mode, 129
single-ended PLL mode, 166
Square wave generation, 140
Using both A and B, 133
Using two to play notes, 145
http://forums.parallax.com/showthread.php?p=922576
Humanoido
Post Edited (Humanoido) : 7/25/2010 6:08:37 PM GMT
Sorry, I wasn't following along closely enough.· I see now your smartest Boebot thread is a branch off of this thread.· I hope you don't mind if I copy my thoughts and questions from the Boebot thread here.· I see now there isn't really any software (using all Props) yet for your Boebot.· I also see that you're still trying to come up with a way of getting all the boards to communicate with each other.· This is insanely thought provoking.· Curses, this keeps me up at night.
Keep us posted on updates.
A note about counters.· Lab 7 of the PEK (in Prop Tool's Help) is about counters.· The list you give are uses and modes of those counters (two per cog).· Amazing stuff.
Duane
Edit: Slap my head!· This is the TEST forum.· I regret never learning to swear.· Okay Humanoido, I guess you haven't posted this in the Propeller forum because of the lack of software at present.· I've got to start looking at the top of the page to see what forum I'm in.
Post Edited (Duane Degn) : 8/2/2010 1:34:05 AM GMT
This is what I'm working on for use with multiple cores/props.
http://www.ultratechnology.com/4thdsm.html
http://www.ultratechnology.com/4thlinda.html#flinda
http://www.ultratechnology.com/4thpar.html
I don't have any code for presentation yet either, this is just food for thought, if you are interested.
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Even the best needles are not sharp at both ends.
humanoido
Post Edited (Humanoido) : 8/2/2010 12:40:43 PM GMT
Software & Wiring Criteria
- Wiring is simplified
- Wiring is easily changeable
- Speed is maximized for the interface used
- Interface facilitates loading all props at the same time
- Interface handles frequency synchronization
- Code handles identifications
- Minimal power consumption is implemented
- Interface is compliant with parallel programming and code
- Parts/Circuits are green configured
humanoido