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What's wrong with my PCB? [re-resolved] — Parallax Forums

What's wrong with my PCB? [re-resolved]

mparkmpark Posts: 1,305
edited 2010-04-09 12:37 in Propeller 1
I made these little PCBs for the QFP Prop, but I must have messed something up. I've assembled a bunch but more than half seem to have bad PLLs.

I first put on the voltage regulator and caps and verify that it puts out 3.3V (nominal; it's always a bit less). Then I solder on the Prop chip and crystal and check continuity on all pins with my meter. I am soldering by hand, btw.

Then I download a little test program. Distressingly often, the test only runs if I comment out the clock mode and crystal settings, which is why I assume the PLL is bad. (If the test passes with the crystal I proceed to add the EEPROM and resistors.)

On my last batch I added 0.1uF bypass caps but they didn't help.

I have a terrible track record with hardware, so it's quite possible the PLL failures are caused by me, but just in case there's a problem in the schematic or layout, I'd be grateful if someone could point it out.

EDIT: The PLLs are not failing. Replacing the little watch crystals with regular crystals makes everything OK, at least so far.

EDIT: It wasn't the crystals themselves, it was flux between the pins.

Post Edited (mpark) : 4/9/2010 4:49:06 AM GMT
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Comments

  • ElectricAyeElectricAye Posts: 4,561
    edited 2010-04-07 22:31
    Might any of this apply to your design, etc.?

    propeller.wikispaces.com/pcbdesign
  • LeonLeon Posts: 7,620
    edited 2010-04-07 22:43
    Each Vdd-Vss pair should be decoupled. I also decouple the EEPROM supply.

    Check that all the Vss and Vdd pins are properly soldered.

    The regulator capacitors should meet the ESR spec.

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    Post Edited (Leon) : 4/7/2010 10:48:49 PM GMT
  • BeanBean Posts: 8,129
    edited 2010-04-07 22:57
    Are you aware that 10Mhz is actually outside of the PLL's rate operating range (4 - 8MHz if I remember correctly).
    I don't know if that has anything to do with the problem, I just thought I would point it out.

    Bean

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  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2010-04-07 23:08
    In addition to needing more bypassing, it looks like your Vdd net is broken into two pieces, so not all the Vdd pins will be receiving power.

    BTW, as ong as you have a sound layout with adequate bypassing, a 10 MHz crystal should work without a problem.

    -Phil
  • mparkmpark Posts: 1,305
    edited 2010-04-07 23:32
    If I read the datasheet correctly, the tab on the regulator is connected to pin 2.
  • mparkmpark Posts: 1,305
    edited 2010-04-07 23:34
    As for each Vdd-Vss pair being decoupled, two of them are so close to the regulator caps—are additional caps really necessary there?

    (I did add caps to the other two Vdd-Vss pairs, as I mentioned.)
  • LeonLeon Posts: 7,620
    edited 2010-04-07 23:43
    I decouple all four. I've never had a PLL failure, FWIW.

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  • RaymanRayman Posts: 14,885
    edited 2010-04-08 00:19
    I wonder if you're even using the right kind of crystal... I haven't seen any with the pins that close together...
    What's the part number for your crystal?

    Also, if you're trying to run at 16X, you'll be lucky if just the first cog works. Definitely won't work with 2 cogs.

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  • Nick McClickNick McClick Posts: 1,003
    edited 2010-04-08 00:57
    I've had a problem with burnt out PLL's, too - it seems that applying power without sufficient caps, even if you aren't using the pll (or running code) will burn it out. The solution for me was to add all caps before applying power. I use 3x 47 uF, a 4.7 tantalum and a .1 uF ceramic.

    I think if you're providing as much capacitance as the Protoboard, you should be fine.

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  • mctriviamctrivia Posts: 3,772
    edited 2010-04-08 01:08
    As a minimum you need bypass cap for each vdd pin on your board. I am on my blackbery and can't see layout but do you have a good ground plane?

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  • mparkmpark Posts: 1,305
    edited 2010-04-08 02:35
    Teeny crystal from this thread: http://forums.parallax.com/showthread.php?p=855037

    I'm using the 10MHz but only at 8x.

    I do put all the caps in before applying power. I'll try squeezing in a couple more decoupling caps.
  • Cluso99Cluso99 Posts: 18,069
    edited 2010-04-08 03:00
    I cannot see how you connect the Vdd traces between the lower LHS & bottom pins to the top & RHS pins.

    I cannot stress enough the importance of decoupling caps. They are mandatory at each set of power pins. I know the PPB only has 2 x 1uF. It is important that the power pins of the prop are joined like a power plane also. Michael, take a look at the RamBlade I sent you.

    BTW I have 13.5MHz * 8 working. I just have not done enough testing to be assured I can run it without problems.

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  • DonEduardoDonEduardo Posts: 54
    edited 2010-04-08 03:06
    The problem is the crystal. The prop manual says you can only use up to an 8Mhz crystal when you enable PLL. You are probably pushing the limits.
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2010-04-08 03:48
    The problem is not the crystal. 10 MHz crystals work just fine with a well-laid-out board. Both the Spin Stamp and Propeller Backpack use 10 MHz crystals without incident. Cluso99 and I have both expressed questions about the Vdd net, though, which appears to be severed.

    -Phil

    Post Edited (Phil Pilgrim (PhiPi)) : 4/8/2010 3:53:27 AM GMT
  • mparkmpark Posts: 1,305
    edited 2010-04-08 04:13
    Re the Vdd net: the voltage regulator's tab and pin 2 (output) are connected. Shouldn't that work?
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2010-04-08 04:31
    Ah, okay, I see what you did now. That should work. I guess it comes down to bypassing, then.

    BTW: Vdd, An .. An+7, Vss is a more "standard" Propeller pinout for headers than Vdd, Vss, An .. An+7.

    -Phil
  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2010-04-08 04:36
    Michael, although it's not recommended that you do it the way you have done it (regulator tab and pin 2) there is no real problem with it. Is the tab soldered properly to the pad as is pin 2? Do a continuity check as well as the visual.

    When it comes to capacitors bigger is not better, you have a value of 1uf for the decouplers, what type are these? Use monolithic ceramic 0.1uF for these as the lower values have a lower impedance at high frequencies which is where they are needed.

    I am also assuming you are running from a power source that can provide the current required when you run at a higher frequency, don't use 9V batteries, they are the worst power source every invented. Go for some AAs or just use a power pack.

    As regards the watch crystals I hope you have it laying down as the things are rather delicate. As a rule try to lay every component flat against the board, anything that can get knocked and bent will be.

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  • mparkmpark Posts: 1,305
    edited 2010-04-08 06:15
    Phil, I was going for the protoboard layout. This is supposed to be kinda like a "nano" protoboard, just squished a little. Don't tell me I messed that up too!

    I'm afraid I haven't paid much attention to the type of caps I use. I assume they're all ceramic. I started with a single 1uF for decoupling 'cuz that's what the Schmartboard prop board uses (the two 10uF guys are for the voltage regulator). I've stuck on a couple 0.1uF and tomorrow I'll try adding a couple more 0.1uF caps. Do you think I should remove the 1uF cap once I have the four 0.1uF guys in?

    I am using a wall wart from Parallax so I'm sure there's plenty of current.

    I appreciate everyone's feedback so far. Tomorrow I hope to try out some things.
  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2010-04-08 06:29
    Hmmm, leaving the other caps in there won't hurt, as long as it has some high-frequency decoupling it doesn't matter what else you tack on. It sounds more and more like the crystal, have you tried another one or another type? Just in case, can you attach your test code just to confirm it's right.

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  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2010-04-08 06:54
    Michael,

    I see what you mean with the Protoboard layout. The "standard" I was referring to was the Demo Board header and the DB Expander pinout, both of which use the Vdd, A[noparse][[/noparse]n] .. A[noparse][[/noparse]n+7], Vss order, along with the pinout of the 40-pin DIP and PropStick USB (by adding Vdd or Vss pins beyond the ends of the package).

    So I guess pick the one that seems the more useful for your app. smile.gif

    -Phil
  • AleAle Posts: 2,363
    edited 2010-04-08 07:59
    mpark I'd rotate the prop 45° to easy the routing.

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  • SapiehaSapieha Posts: 2,964
    edited 2010-04-08 08:22
    Hi mpark.

    I we be track this thread from start and are surprised that anyone have not mentioned That You have to small space between signal/Power traces and Traces/Vias to XTal.

    You must always think as XTal are small signal analog device very sensitive to transients on its Traces - And that require careful Routing around them to WORK correctly.

    Regards
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  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2010-04-08 08:40
    @Sapieha, a lot are mentioning about ways to improve the pcb for next time but that doesn't help Michael now. Besides there are a lot of things I could say too about the layout but nonetheless from what I can see it should be functional, at least what I can make out from a a lowres png anyway.

    @Michael, did you try another crystal? Have you checked the supply voltages? Maybe a photo will help.

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  • SapiehaSapieha Posts: 2,964
    edited 2010-04-08 08:47
    Hi Peter Jakacki.

    I agree - But it is some things He can improve around XTals via's - That need some careful skills to handle knife.
    After soldering XTal he need klear with knife spaces between via's to XTal and other traces to have as big space between them as posible.

    Regards

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  • Nick McClickNick McClick Posts: 1,003
    edited 2010-04-08 09:14
    @mpark - the only thing that has caused me to blow PLL's before is not having caps, and I had the same experience (about half were bad, but about half worked).

    If you're okay there, I guess I'd suspect the crystal. Maybe there's an open or short. You might try pulling the prop off and testing it with another xtal, or jury rigging another xtal on to see if you can get it to work.

    fwiw

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  • RaymanRayman Posts: 14,885
    edited 2010-04-08 13:10
    mpark: I looked at your link but still can't figure out what crystal you're trying to use... Can you give us the part#?



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  • LeonLeon Posts: 7,620
    edited 2010-04-08 13:36
    It's this one, presumably:

    gb.mouser.com/search/ProductDetail.aspx?qs=6siQ5y5nVCyQVMHsj0Ua5w==

    It's 18pF. That might possibly cause a problem at 10 MHz as the oscillator is out of spec. at that frequency.

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    Post Edited (Leon) : 4/8/2010 1:47:05 PM GMT
  • RaymanRayman Posts: 14,885
    edited 2010-04-08 17:26
    Well, those specs look close to those of the 5MHz SMT one I use: XC670TR-ND

    Only big difference may be "drive level" which is 5X bigger for mine.

    Anyway, since I've not seen anybody using this type of crystal before with the Prop, I would bet that's the problem.

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  • mparkmpark Posts: 1,305
    edited 2010-04-08 18:21
    Hmmm. Apparently I'm not frying PLLs left and right. I replaced the crystals on two of my bad boards with 6.25MHz Henning specials and they both work fine now.

    Peter Jakacki, haven't you had good luck with the little 10MHz Citizen crystals, or was it just the 5MHz?

    Sapieha, see attached drawing. Are you suggesting I trim away the pink portions of the copper, top and bottom?
    sapieha.PNG
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  • CannibalRoboticsCannibalRobotics Posts: 535
    edited 2010-04-08 19:00
    I'd suggest the following:
    1) Your Vdd inputs seem sort of strung out - If you look at the back of a proto-board you'll notice the power plane is very even and close to the Vdd inputs. They also have allot of foil feeding them. Bypass caps should also have a solid ground - use the 'solid' connection to the ground plane not the 'thermal' in Express PCB.
    2) As a general guideline, you'd like your decoupling caps as close to the Vdd inputs as you can get.
    3) Echoing an earlier comment, your crystal trace lines could use some breathing room.
    4) There is just a whole lot going on in a very small space there. Any chance you could spread it out a bit?
    I know this is not helping on you current run of boards. One thing you might try with this design is to put a pretty beefy wire between the regulator tab output and pin output to make sure those are balanced at startup.
    I feel your pain, I've experienced similar problems with boards - I solved it with bigger ground planes and power delivery from a single point directly under the prop.
    Jim-

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