Connecting power ground to logic ground - good idea? bad idea? or just plain ug

ElectricAye

Greetings,


I'm designing a PCB that uses a Power Logic 8-bit Shift Register known as a TPIC6595, chip. It's basically a shift register with mosfets built into it. My question is this: should the TPIC6595's power ground (which is being dumped on by the mosfets) be tied into the logic ground (which is the side being controlled by a Propeller, so it would be the Propeller's Vss.)? I know I've been told in the past that logic grounds and power grounds should not be the same, but other Propeller-controlled mosfets that I've used in the past have required that the Propeller's Vss be tied to the negative side of the power that is being switched by the mosfet. So I'm confused on how to handle this. The TPIC6595's data sheet (attached) mentions something about preventing cross-talk between the logic ground and power ground, but how is that done? Must I add some kind of bypass capacitors or what?

thanks for your wisdom on this,
Mark

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Watching the world pass me by, one photon at a time.

kwinn

Mark, if you look at the "TYPICAL OF ALL DRAIN OUTPUTS" schematic on page 3 of the data sheet you will see that the logic ground and power ground are connected internally through a resistor. For the logic signal to turn the transistor on it needs to be referenced to the transistor ground. A good layout would be:

Logic grounds on pin 19 connected to the power ground at a single point on the PCB.
A .01uF bypass cap between Vcc and logic ground on each chip.
All 4 power ground pins should be connected to the power ground.
A 0.1uF bypass cap between the power V+ and power ground on each chip.
An on board electrolytic capacitor (1000 + uF) on the V+ supply.

ElectricAye

kwinn said...
Mark, if you look at the "TYPICAL OF ALL DRAIN OUTPUTS" schematic on page 3 of the data sheet you will see that the logic ground and power ground are connected internally through a resistor. For the logic signal to turn the transistor on it needs to be referenced to the transistor ground. A good layout would be:

Logic grounds on pin 19 connected to the power ground at a single point on the PCB.
A .01uF bypass cap between Vcc and logic ground on each chip.
All 4 power ground pins should be connected to the power ground.
A 0.1uF bypass cap between the power V+ and power ground on each chip.
An on board electrolytic capacitor (1000 + uF) on the V+ supply.

Awesome! Yes, now I see that resistor you mentioned. Thank you very, very much for the tips on how to do this correctly!

Mark

mctrivia

just a note when running pcb traces to reduce EMI you should always have a ground plane below the traces which should not be broken. if there is a break returning current will have to find a longer path.

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ElectricAye

mctrivia said...
just a note when running pcb traces to reduce EMI you should always have a ground plane below the traces which should not be broken. if there is a break returning current will have to find a longer path.

Very good point. Thanks for bringing that up.

Clock Loop

Remember that in all PC computer supplies, DC GND is tied to the GROUND PIN on your AC OUTLET (which is also neutral)
If that is not a mess of noise, then nothing is.

But some how computers run fine.


Optical isolators are one way to trigger a gate and not tie the LOGIC to the POWER.

mctrivia

Neutral is tied to ground at the main panel. E=ir so the higher the current the greater the voltage on the neutral line. I=0 on ground wire so v=0

In many comercial buildings for computer outlets the ground is isolated all the way back to the main panel.

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24 bit LCD Breakout Board coming soon. $21.99 has backlight driver and touch sensitive decoder.

ElectricAye

kwinn said...
....
A 0.1uF bypass cap between the power V+ and power ground on each chip.
An on board electrolytic capacitor (1000 + uF) on the V+ supply.

Hmmm. Sorry, but I've grown a little bit confused about these bypass caps as I started laying out the PCB. The heaters which these TPIC chips are controlling with PWM are located about 1 foot away from the actual PCB that the TPICs are mounted to, so the power V+ cable that goes to those heaters is somewhat far away from the TPIC chips. Should I run a cable from power V+ to the chips just so I can connect the 0.1uF bypass caps? or did you mean to say "Vcc" and not "power V+" ???

Also, if "power V+" is correct, wouldn't a bypass cap from power V+ to power ground possibly degrade the PWM signal? I'm only using 100 Hz PWM so maybe that wouldn't be an issue anyway, but I thought I'd better ask.

thanks,
Mark

kwinn

Since you are using PWM on a resistive load you can skip the 0.1uF caps. The 1000+uF electrolytic was intended to reduce the current pulses from the power supply to the board the TPICs are on. If V+ goes directly to one side of the heaters from the power supply and the other side of the heater goes to the TPICs the electrolytic cap is not needed.

ElectricAye

kwinn said...
Since you are using PWM on a resistive load you can skip the 0.1uF caps. The 1000+uF electrolytic was intended to reduce the current pulses from the power supply to the board the TPICs are on. If V+ goes directly to one side of the heaters from the power supply and the other side of the heater goes to the TPICs the electrolytic cap is not needed.

Wow! That's great news. Thanks for the super-speedy reply. I'm at my desk doing the layout right now and I was afraid I'd have to fret over this all weekend.

Thanks for the super awesome assistance!

Have a Happy Halloween!