How unique is the propeller chip?
Clock Loop
Posts: 2,069
I was just thinking about how the multi-core revolution has just begun, and how most of the programming done today is single core.
I would say that the propeller is a perfect baby step towards getting programmers to think multi-core.
We have all this power in multi core but always seem to only speed things up when cranking up the clock.
Does anyone know of any other multi-core chip like the prop?
I would say that the propeller is a perfect baby step towards getting programmers to think multi-core.
We have all this power in multi core but always seem to only speed things up when cranking up the clock.
Does anyone know of any other multi-core chip like the prop?
Comments
There is one other chip similar to the Propeller, but not actually "like" the prop. I has many other features, and a lot of added zeros to the price. I can't recall the exact chip, but do remember a discussion on here about it.
The Propeller is one of the most versatile chips for the money.
James L
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James L
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Cavium Octeon
Cavium Octeon II
Other "serious" multi-core processors:
AMD 6-core CPU
Then there's the Intel stuff.
Also, NXP has announced a series of ARM Cortex A9 multi-core controllers ... all I can find is press releases.
Check out the Sun Niagra 8 core CPU
K.B.
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Single core will someday soon seem very last century!
It was strange using the prop at first for me, having depended so heavily
on interrupts...but multi-core is so superior!
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"Where am I? Where am I going? Why am I in a handbasket?"
Plus the tools are free. Probably the cheapest introduction to parallel processing.
Other multicores include IBM/Freescale PowerPC's - used in automotive applications.
Intel has dual core Atom's going into 2012 BMW's and Mercedes.
Xbox elite with its 3 core PPC clocking in at 3.2ghz.
Parallelism is a kind of thinking, it doesn't matter, if multiple core exists. But: it is better. And the propeller brings this technology to the people.
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Post Edited (ErNa) : 10/17/2009 1:14:52 PM GMT
In the context of many embedded systems, real-time control and the majority of projects going on in this forum it is not much help to have a quad core Intel or mega core MIPS etc. Most of those are not designed with deterministic timing, the removal of interrupts, total independence of threads etc in mind.
Where is matters here, in the embedded, real-time world, the Prop is still unique as far as I can tell. The idea here is "software defined silicon" as XMOS says. Using processors to do what dedicated circuitry would be needed for in a "normal" controller. Flexibility without the complexity/expense of FPGA. You just can't do that with a quad core Intel anything.
Now XMOS seem to have the nearest competing chip, I have not looked at it so hard but I'm sure it's not anywhere as quick and easy for a user to get up to speed with unless they have a good grounding in the C language, compilers, linkers, mappers etc. etc.
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I don't think that the Propeller cog is a RISC processor, as the term is generally accepted.
Both the Propeller and the XMOS chips (and the SeaForth) have MIMD (multiple instruction, multiple data) architectures, like the transputer. That distinguishes them from many of the other chips exploiting parallelism. Each XMOS processor runs at 400 MIPS, giving 1600 MIPS for the four core device. The single core 400 MIPS device costs about the same as a Propeller, and has eight 100/50 MIPS hardware threads, like the Propeller's eight cogs. The threads operate in round-robin fashion, though. As they use standard C and XMOS's own XC, they are quite easy to use.
I've got some SeaForth chips, but haven't done anything with them.
Leon
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Post Edited (Leon) : 10/17/2009 1:42:46 PM GMT
The Raytheon board that powers the F-22 Raptor instrumentation is
a multi-core system with 66 Power PC processors.
It is nearly a supercomputer.
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"Where am I? Where am I going? Why am I in a handbasket?"
Very true.
However, compared to high end multi-core solutions development, programming micocontrollers is like being a fat man in a straight jacket trying to juggle bowling balls. Of course anyone who has never done high end > 16x multi-core programming wouldn't understand.
The XMOS chip is also RISC, in that sense, as it has a load and store architecture.
Leon
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That particular mode is unique as far as I can tell.
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If I were a real pro (or lots more time and money), I'd probably use an ARM chip or an FPGA...
Actually, I'll retract that comment now because I feel like a quasi-pro and I'm still going to stick with the Prop!
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Post Edited (Rayman) : 10/17/2009 3:45:03 PM GMT
There are some similarities there with how a COG works for sure. I've attached a block diagram, showing the core elements and their relationships, along with an image of the text from the central CPU operating manual.
(I seriously love this stuff)
IMHO, the Propeller is unique in the combination of these ideas (concurrent multi-processing at the CPU level, not just data xfer, or compute) (structured, round robin shared memory access) (I/O pin states shared among CPUs).
Edit: From a more extended read, the idea of memory access via simple rule (ie: round robin), is unique to the Propeller. This machine featured the ability to get at shared memory via rules, but their focus was throughput and conflict resolution, rather than deterministic behavior. That's where the magic is in the prop --that and the idea of non-associative compute spaces for the COGs. Those things together permit some very interesting parallel behavior. ie: Program running on one CPU, appears much like hardware would to another, in that they don't impact one another, unless the programmer deems that necessary. This is a big part of where the "cool" is on the prop, again IMHO, of course.
Another part of the "cool", and something which is a love / hate with me, happens to be the minimal working register design. With few exceptions, the instruction set is pure memory-to-memory direct, with only a PC, and some control registers existing for dedicated functions. This gets a bit difficult, particularly when one is used to load, compute, store designs, where registers exist as addressable things, apart from the program and data memory. On Propeller, these are one and the same in the COG memory space. I'll pass on characterizing LMM for now....
Another Edit: (sorry) I would add that having come up on the learning curve for this, I find load, compute, store register based designs strange and limiting now. Having to sort ops according to central memory access windows is way different than sorting them to make optimal use of the register space on an ordinary CPU. Fun stuff! PASM is just bad *** fun and powerful. It's elegant too, of course those things are all subjective. I like a 6809 for very similar subjective things, and wouldn't qualify these observations as part of the uniqueness of the prop, just appreciation for it, to be clear.
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Propeller Wiki: Share the coolness!
Chat in real time with other Propellerheads on IRC #propeller @ freenode.net
Safety Tip: Life is as good as YOU think it is!
Post Edited (potatohead) : 10/17/2009 3:51:52 PM GMT
www.xmoslinkers.org/node/316
www.xmoslinkers.org/node/135
www.xmoslinkers.org/node/105
www.xmoslinkers.org/node/76
The last three are by Ale, who is also well known here. The XMOS chip doesn't need any special video hardware (100 MHz I/O), but resolution is limited by the 64k RAM available to each core. External RAM could be used, of course.
Leon
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Post Edited (Leon) : 10/17/2009 3:45:13 PM GMT
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My Prop Info&Apps: ·http://www.rayslogic.com/propeller/propeller.htm
The XMOS chip is nice, and the monocore version is even cheaper than the propeller but comes only in fine pitch packages... the other ones are BGA...
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Visit some of my articles at Propeller Wiki:
MATH on the propeller propeller.wikispaces.com/MATH
pPropQL: propeller.wikispaces.com/pPropQL
pPropQL020: propeller.wikispaces.com/pPropQL020
OMU for the pPropQL/020 propeller.wikispaces.com/OMU
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My Prop Info&Apps: ·http://www.rayslogic.com/propeller/propeller.htm
en.wikipedia.org/wiki/Synchronous_dynamic_random_access_memory
Leon
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Amateur radio callsign: G1HSM
Suzuki SV1000S motorcycle
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My Prop Info&Apps: ·http://www.rayslogic.com/propeller/propeller.htm
"...happens to be the minimal working register design."
Interesting. I might look at the Cogs the other way around. A "load/store" architecture, via [noparse][[/noparse]rd,wr][noparse][[/noparse]long,word,byte] and a huge register set of 496 plus 16 special purpose regs. Disregarding where instructions are actually executed from.
It really is hard to put the COG into any common processor category.
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For me, the past is not over yet.
Leon
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Amateur radio callsign: G1HSM
Suzuki SV1000S motorcycle
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My Prop Info&Apps: ·http://www.rayslogic.com/propeller/propeller.htm
PICs can be regarded as having lots of registers in a similar fashion. Many operations involving the working register can write the result back to a memory register in the same cycle.
Leon
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Amateur radio callsign: G1HSM
Suzuki SV1000S motorcycle
www.xmos.com/technology/prototype-boards/usbaudio2
The USB3318 chip in the schematic is the USB Phy, everything else is done in software.
It all runs on one $7 single-core chip!
Leon
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Amateur radio callsign: G1HSM
Suzuki SV1000S motorcycle
Post Edited (Leon) : 10/17/2009 4:37:15 PM GMT