Propeller 1 on Tang Primer 25K FPGA
FredBlais
Posts: 397
in Propeller 1
For those interested, I've forked the Propeller_1_Design repo and added a new target, being the Tang Primer 25k
The 8 cogs are working. For now, the programs are embedded with the bitstream (pre-initialized Propeller hub RAM), the serial/EEPROM boot is bypassed by starting the cog 0 pointer at $F004 instead of the booter (around $F800).
You can learn more here : build info
Build Report
- Logic: 15849/23040, 69%
- Register: 5306/23280, 23%
- BSRAM: 40/56, 72%
- PLLA: 1/6, 17%
Comments
Congratulations!
Do you think, that there is a way to have bigger HUB RAM for the emulation than the original? RAM shortage was the central limitation of P1. Maybe Tang Nano 20K with 64MBITs of SDRAM could be used?
Christof
Cheers Fred, very interesting, now thinking of all kinds of application specific P1 variants
Maybe an overclocked. Frankenstein P1 with PCI-express and NVME support along with gigabit ethernet
Video upgraded to 4k hdmi
Just joking… But there could be interesting IP core connected to the P1. I don’t know if it would be doable to give the cogs access to a wishbone bus. Maybe some new instructions to add along with egg beater access