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Is there some single instruction like WRC but setting ALL bits? — Parallax Forums

Is there some single instruction like WRC but setting ALL bits?

Hi,
for my Forth, at the moment I use WRZ and WRC to get a logic result as true or false onto the stack. However it would be better to have $FFFFFFFF for true instead of 1. I had a look into the list of instructions https://p2docs.github.io/p2_optable.html , but perhaps I have overlooked something?
WRZ followed by NEG is best then?
Thanks, Christof

Comments

  • You can use MUXC or MUXZ D,##$FFFFFFFF which also uses two longs. But if you need it more than once you can store the S operand in a register instead of using ##.

  • With the C flag, you can also use SUBX with the same register in both slots.

  • TonyB_TonyB_ Posts: 2,277
    edited 2026-04-20 11:24

    @"Christof Eb." said:
    Hi,
    for my Forth, at the moment I use WRZ and WRC to get a logic result as true or false onto the stack. However it would be better to have $FFFFFFFF for true instead of 1. I had a look into the list of instructions https://p2docs.github.io/p2_optable.html , but perhaps I have overlooked something?
    WRZ followed by NEG is best then?
    Thanks, Christof

    It can be done in one instruction for C and Z (latter needs a constant long).

    'a = 0/$FFFF_FFFF if c or z = 0/1
    
    'c
            subx    a,a        'or bitc    a,b
    'z
            bitz    a,b
    
    b       long    0 + 31 << 5
    
  • Thank you all very much!
    (((I must admit, that "Bits D[S[9:5]+S[4:0]:S[4:0]]" is rather obscure to me, the "+S[4:0]". Is this some kind of relative addressing of the bits? Why on earth?)))
    As cog registers are very precious at the moment, I am happy to use subx.

  • TonyB_TonyB_ Posts: 2,277
    edited 2026-04-20 15:19

    @"Christof Eb." said:
    Thank you all very much!
    (((I must admit, that "Bits D[S[9:5]+S[4:0]:S[4:0]]" is rather obscure to me, the "+S[4:0]". Is this some kind of relative addressing of the bits? Why on earth?)))
    As cog registers are very precious at the moment, I am happy to use subx.

    S[4:0] is the rightmost bit and S[9:5] is the number of extra contiguous bits to the left of that. If S[9:5] = 0 only one bit is changed as given by S[4:0]. A 9-bit #S can change up to 16 bits, hence need for register b above to change all 32 bits in a single 2-cycle instruction.

  • evanhevanh Posts: 17,181

    Another way to say it is S[4:0] is the base bit number and S[9:5] + 1 is the bit range. This applies to a selection of bit operating instructions. And all the pin modifying instructions do the same but using S[:5:0] and S[11:6] + 1 instead.

  • Thank you for the clarifications!
    I wonder, if something like "Bits D[ (S[9:5]+S[4:0]) : S[4:0] ] = Z" would be easier to grasp?

  • evanhevanh Posts: 17,181

    If you're talking about something like the WRC instruction then no, it wouldn't help. Assuming this mechanism was supported by such instructions, you're still looking at prefixing with an AUGS to fill all 32 bits.

  • evanhevanh Posts: 17,181

    Hang on, what grasping are you talking about now? BITZ is an instruction, are you thinking of using it as an alternative to WRZ?

  • RaymanRayman Posts: 16,326

    Couldn’t one do the SUBX and then

    If_c mov a,b

    Where b = -1 ?

  • @evanh said:
    Hang on, what grasping are you talking about now? BITZ is an instruction, are you thinking of using it as an alternative to WRZ?

    Oh, sorry my bad English. I meant my difficulty to understand a condensed complex term like "Bits D[S[9:5]+S[4:0]:S[4:0]]".

  • Christof Eb.Christof Eb. Posts: 1,559
    edited 2026-04-21 09:06

    @Rayman said:
    Couldn’t one do the SUBX and then

    If_c mov a,b

    Where b = -1 ?

    I was looking for the most compact way to convert the flags into TRUE/FALSE values. My XBYTE machine has to live in the first half of LUT and can only access 8 cog registers pr0...pr7. SUBX does it all in one step for the carry flag.
    For the Z flag however you need either 2 instructions or one instruction and a register holding -1 or the encoding of the bits for BITZ.

    In Taqoz one register is reserved as -1 all the time. FlexC seems to use ##-1 every time it needs it.

  • RaymanRayman Posts: 16,326

    What about if_c not a ?

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