P2 Glossary suggestion and brain-mind-explordination thread
Wuerfel_21
Posts: 5,634
As mentioned elsewhere, I am wondering if we need a glossary of Propeller specific technical and community terms.
I could very easily put one on P2docs. EDIT: Draft version now live at https://p2docs.github.io/glossary.html
Some initial ones that come to mind at 2 AM:
Technical:
Cog
- Cog RAM
- cogexec
Hub
- hubexec
Smart Pin
- Streamer
- FIFO
- PSRAM
- Spin / P2ASM (and how they are essentially the same)
Tools/Resources:
- PNut
- Propeller Tool
- Spin Tools
- FlexSpin / spin2cpp
- OBEX
- Silicon Doc
- P2docs
Post your own suggestions here - if you notice any odd terms that probably don't make sense to a noob, post them here. Even if you think it's stupid -> this is just exploratory, I can curate what actually goes on the site. Maybe we can even have a little bit of fun and humour. As a treat.
Comments
THANK YOU! I'm not sure if the community realizes how much cognitive overhead is introduced by having this much jargon, even if you know what they all mean. It's ok to have jargon, especially if it is "official" (ie. branded and coordinated with marketing), and many on your list are terms of art regarding technology in the P2. But if the only definition for a word/abbreviation/acronym is a few threads on the forum that half a dozen people were involved in 2 years ago, that's crossing a line into obscurity. Here's the unique ones from my list:
IMHO, there's no need to define words that have well-understood meanings in the rest of the software industry like "bytecode", just P2-specific words like "hubexec" and less common terms that are used in high frequency when discussing the P2 like "QSPI".
That's another bunch, though some of them are P1-only terms, not sure what to do with those (since it's ostensibly p2docs)
I think I can write and publish a preliminary page with what we have so far today or maybe tomorrow.
A bunch more that come to mind:
Great idea and obviously very handy for newcomers.
Also the P2 "Pin mode" thing - originally I know I had a hard time separating this out from the whole Smart Pin concept as I though they were linked but it's really only a tenuous link and it's sort of its own thing you can control (mostly) independently.
I need to claim ownership on promoting that division of pin/smartpin naming. I've tried to encourage Chip to adopt the distinction in naming too.but I'm not sure Chip has decided to agree on that at all.
His writings sometimes imply the fancy pin modes, ADC/DAC and co, are what's smart. And that probably goes right back to the fact that he put a lot of effort into the custom design of the pad-ring. It wasn't until much later, in the second "cool" Prop2 design, that he settled on a distinct per pin processing unit containing a bunch of state-machines. The first "hot" Prop2 design didn't have the verilog smartpin unit at all. Also, at one stage, there was a non-modal attempt with one large state-machine per pin. That lasted a month or so before he threw it out and started over on what we have now.
I've started drafting up the glossary page: https://p2docs.github.io/glossary.html
The definitions are very incomplete still. This is now the list of planned glossary items, but please still comment here if you can think of any more)
I also started a new contribution guide document (to hopefully inspire more pull requests and issues - https://github.com/p2docs/p2docs.github.io/blob/master/CONTRIBUTING.md ) and did a few other improvements around the site.
Answering the question in your glossary, the Prop2 "hot" design started a while back - https://forums.parallax.com/discussion/125543/propeller-ii-update-blog/p1
To be fair to the timeline, I'm not sure what if any of Beau's work went into the final product. I think Chip changed strategy from full custom to just doing the pad-ring as custom and the core done with OnSemi synthesised.
edit: even earlier - https://forums.parallax.com/discussion/105875/more-prop-ii-info/p1
I think it's moreso interesting when the current design came about (so we can say "P2 discussions before 20XX are about P2Hot")
Early 2014, I read somewhere. EDIT: Found it - https://forums.parallax.com/discussion/155014/were-looking-at-5-watts-in-a-bga/p1
EDIT2: And that was then quickly followed with the 16 cog start-over - https://forums.parallax.com/discussion/155132/the-new-16-cog-512kb-64-analog-i-o-propeller-chip/p1
There was a big change sometime after that, but before the smatpin unit, where the cross-point switch (eggbeater) was added. That changed the hubRAM bus width from being based on the "Hot's" fat 128-bit wide back to the FIFO'd 32-bit we have now.
PS: I suspect smartpin's were a big factor in why 16 cogs didn't fit in the end. Adding the Cordic and lutRAM promoted to dual-ported didn't help either.
Thank you, I've incorporated the timing now. Also added a few more items.