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Wuerfel_21 · 2025-09-19 12:44

Adding instructions to the sound thing should not be causing video corruption wtf.
Need to check that later, currently phoneposting on a tram amd i'll get sick if i stare at the phone.

rogloh · 2025-09-19 12:45

Ok, I will check later. The audio did make video worse (maybe power noise effect again on video, but this time the whole scanline glitches, more like software timing error).

Wuerfel_21 · 2025-09-19 13:03

Can you post what timing values you have right now? Will check them at home.

(Wow I'm queasy even now. The tram lines here are really violent, they take hills and 90° turns at full speed like they're nothing and I'm prone to handheld-screen-in-moving-vehicle-related motion sickness)

rogloh · 2025-09-19 14:41

Not sure which timing you wanted exactly, but ok
For PSRAM:

' For PSRAM (either type)
PSRAM_CLK = 56
PSRAM_SELECT = 57
PSRAM_BASE = 40
PSRAM_BANKS = 4 ' Only used to stop further banks from interfering

PSRAM_WAIT  = 5
PSRAM_DELAY = 16
PSRAM_SYNC_CLOCK = false
PSRAM_SYNC_DATA = true

' Uncomment for slower memory clock
#define USE_PSRAM_SLOW

For video timing it's:

timing_lcd24_640x480
long VIDEO_CLKFREQ  ' CLKFREQ
long 2              ' active line multiplier
long 10             ' V front porch
long 32            ' V sync
long 2              ' V back porch
long 64             ' extra pillar
long 640            ' blank line
long 14             ' H front porch
long 8              ' H sync
long 20             ' H back porch
long $08000000      ' Sync NCO
long $08000000      ' Pixel NCO
long 0              ' Alt-res NCO
long 16 + (16>>1)<<16 ' pixel clock pulses
long 1

For audio sample timing it's this:

DSP_SAMPLE_RATE = 32_000

DAC_SCALE = $FF00
DAC_CENTER = $8000 'DAC_SCALE/2
DAC_SCAS = $4000 'DAC_SCALE/4

dsp_dosample
              ' Output last sample to DAC, then compute next one
              mov pa,dsp_daccenter
              scas dsp_lsample,dsp_dacscas
              setword pa,0-0, #1
              mov pb,dsp_daccenter
              scas dsp_rsample,dsp_dacscas
              setword pb,0-0, #1
              bitnot pa, #31
              bitnot pb, #31
              wypin pa,dsp_lpin
              wypin pb,dsp_rpin
         '    setword pa,dsp_lsample,#0
         '    setword pa,dsp_rsample,#1
         '    cmps dsp_dpin,#0 wc
    nop
      ' if_nc wxpin pa,dsp_dpin
              addct1 audio_timestamp, ##_CLKFREQ/DSP_SAMPLE_RATE
dsp_run_ptch  jmp #\dsp_run


.no_spcload
              }
              ' setup pins (MEGA TODO FOR TIMING)
              ' Use PWM mode despite non-multiple-of-256 period
              ' It's just better.
              wrpin ##P_NCO_DUTY|P_OE,dsp_lpin
              wrpin ##P_NCO_DUTY|P_OE,dsp_rpin
              wxpin #20,dsp_lpin
              wxpin #20,dsp_rpin
              wypin ##$8000_0000,dsp_lpin
              wypin ##$8000_0000,dsp_rpin
              drvl dsp_lpin
              drvl dsp_rpin
              ' Setup event on left pin ready
              mov pa,#%001_000000
              add pa,dsp_lpin
              setse1 pa
              getct audio_timestamp
              addct1 audio_timestamp, ##_CLKFREQ/DSP_SAMPLE_RATE

              jmp #\sp_nextop '' GO!

rogloh · 2025-09-19 15:02

Video glitches now seem fixed once I did this change below with an added waitx #15 to phase adjust the clock edge (so it may not be audio related, although it seemed to make a difference before):

              ' setup CLK pin (abuse breezeway entry)
              debug(ubin_long(dira,dirb,outa,outb))
              setcfrq nco_sync
              getbyte pb,extravpins,#0
              drvl pb
              wypin bit31,pb
              waitx #15 '****--- experimental waitx to sync clock 

              xinit ##$fffc,blank_color ' enter dummy command to ensure it stays in sync
              waitx #511

              jmp #video_entry

Wuerfel_21 · 2025-09-19 17:12

Wait, isn't that the same as inverting the clock polarity?

rogloh · 2025-09-20 01:37

Thought you might think that but no, that was already done below. For a 16 clock pixel period waitx #15 is effectively like a "waitx -1" (which is not possible). So in this case the pixel clock is better one P2 clock earlier for the data to be read reliably. What is strange is that it's such a narrow window of good phases. For only ~20MHz clocking I'd expect far wider eye for good clocking. Maybe there's a lot of signal bouncing going on before things stabilize for all the parallel RGB data bits to be clocked - need to probe colour pins.

              ' Pre-setup clock pin
              getbyte pb,extravpins,#0
              wrpin ##P_OE|P_PULSE|P_INVERT_OUTPUT|P_SYNC_IO,pb
              debug(uhex_long(hsync_breeze),udec(pb))
              wxpin hsync_breeze,pb

I realized I should try to dig up my old P2 tablet (800x480 res) and try to run this LCD test code too with necessary tweaks. It also uses a parallel 24 bit LCD interface but I'm not sure which P2 pins I ended up putting the sync's on though - might have been why I generated PWM outputs for Hsync/DE signals. That system has a 4 bit PSRAM so might be able to run something too. It does also have a VGA output and a USB host port.

rogloh · 2025-09-20 05:35

@Wuerfel_21 said:
@rogloh I tried porting the LCD24 patch over to all variants (branch name is lcd24-test in all cases), please test and report back:

MisoYume ( https://github.com/IRQsome/MisoYume or https://git.sr.ht/~wuerfel_21/MisoYume )
Try a game with HiRes modes (Trials of Mana uses Mode 5 heavily - check if the text is readable. Make sure you have the newer ~6MB collection ROM or the japenese original - the older ~4MB english patch versions don't actually have hires fonts)

Just tested that and the hi-res text line is clear and readable and looks good. 👍 MisoYume seems pretty good, tried a bunch of things and some games fail to start up but I think that is to be expected. In general I think this is pretty decent on and sounds great too, especially on headphones. I went back to setting #5 for the WXPIN param and video is still okay with that other waitx change I made earlier.

rogloh · 2025-09-20 06:27

Tried MegaYume, for some strange reason there are a lot of blank lines at the top of the menu pushing it down (maybe by design) and they are also seen in games. This seems weird as I only have 2 back porch lines in the timing so it should be able to start earlier on the screen. Here's some pics of that.

timing_lcd24_640x480
long VIDEO_CLKFREQ  ' CLKFREQ
long 2              ' active line multiplier
long 10             ' V front porch
long 32             ' V sync
long 2              ' V back porch
long 0              ' extra pillar
long 640            ' blank line
long 16             ' H front porch
long 8              ' H sync
long 20             ' H back porch
long $0888888A      ' Sync NCO
long $0888888A>>1   ' Pixel NCO
long 0              ' Alt-res NCO
long 15 + (15>>1)<<16 ' pixel clock pulses
long 1

I also needed to do a waitx #14 to get a decent image with the clock pin also inverted. Based on this and the other emulators I think we probably need a custom phase delay parameter in config.spin that people could tweak to do this waitx #phase_delay whenever it's set to non-negative values for example - like your other pin settings etc.

' setup CLK pin (abuse breezeway entry)
debug(ubin_long(dira,dirb,outa,outb))
setcfrq nco_sync
getbyte pb,extravpins,#0
drvl pb
wypin bit31,pb
waitx #14 '##### ----- needed this to get stable video output
xinit ##$fffc,blank_color ' enter dummy command to ensure it stays in sync
waitx #511

jmp #video_entry

Wuerfel_21 · 2025-09-20 08:01

Yeah that shouldn't be that far down

rogloh · 2025-09-20 08:21

@Wuerfel_21 said:
Yeah that shouldn't be that far down

Something seemed a little different there when you render your horizontal lines vs other emulators (start or end of sync difference perhaps?). But I fixed it just now with this timing (your original default values are shown commented out).

I also just got audio working too on MegaYume now so I'm quite happy about that too. All three of your main P2 game system emulators pretty much appear to work ok now on this system.

timing_lcd24_640x480
long VIDEO_CLKFREQ  ' CLKFREQ
long 2              ' active line multiplier
long 41 '10             ' V front porch
long 1  '32             ' V sync
long 2              ' V back porch
...

Wuerfel_21 · 2025-09-20 08:33

Weird that that makes a difference.

But yeah beyond that we just got the couple standalone games. Spin Hexagon blocked on your video driver, etc etc

rogloh · 2025-09-20 09:27

You didn't mention Spin Hexagon in the list. I should try it out with my video driver at VGA resolution if that works.

Wuerfel_21 · 2025-09-20 09:47

I didn't mention it because I didn't apply any patch to that one.
Though another case of the whacky audio drivers lurks therein.

(The Tempest2000 one and the P1CC ones are all ostensibly normal).

rogloh · 2025-09-20 10:26

@Wuerfel_21 said:
I didn't mention it because I didn't apply any patch to that one.

Would it work ok with the USB controller or does it need a keyboard?

Wuerfel_21 · 2025-09-20 10:32

I think I added controller support at some point? Reply hazy.
Is quite certainly behind on USBnew versions, so maybe cop the latest one from somewhere else.

rogloh · 2025-09-20 10:38

@Wuerfel_21 said:
I think I added controller support at some point? Reply hazy.
Is quite certainly behind on USBnew versions, so maybe cop the latest one from somewhere else.

Ok. Plus I already have a hard coded p2videodrv file that could work instead of the existing one.

Seems the audio for this game runs from an ISR triggered off the DAC ready event. Will need to make that a timer based one now, that's the trickiest part to modify plus I'm not too familiar with how sca/scas work so I tend to hack about with modifying various DAC offsets etc until I get something sort of running in P_NCO_DUTY mode.

rogloh · 2025-09-20 10:51

Getting a build error - regarding FAT32 stuff: (I took the latest code from your mega.nz link today). Does something else need special configuration somewhere?

EDIT: okay using Flexspin 7.5.0 fixed it.

rogloh · 2025-09-20 11:00

Oh yeah - sounds a little distorted but it runs. I might have overdriven the audio a bit, but I can tweak from here. Very difficult game to master. Having a crisp VGA res LCD in this handheld is awesome.

Wuerfel_21 · 2025-09-20 11:02

At some point I added checking the P1 version (amongst other things) to the flexspin CI, because it just keeps breaking like that.

Wuerfel_21 · 2025-09-20 11:07

(Also IIRC the SD/sound driver has a bug where it sometimes drops commands, not sure if that still exists, but if it happens, be rest assured it's "normal")

Also I think that's the last weird sound driver, the other ones all use the fine and normal loop structure.
Probably good to collect them all when you're done so I can figure out how to move forward with all that (using a timer is ostensibly better than relying on the DAC buffer, since that'd enable pure HDMI audio without real DAC pins, too)

rogloh · 2025-09-20 11:12

Yeah it makes sense for me to bundle the changes so you might find a clean way to nicely integrate these different options for some audio/video and pin settings etc.
I've got 4 of your games/emulators essentially running now and can zip them up so you can diff against your branch. However I need to remove the hard coded hack from my own video driver and essentially integrate my own parallel LCD support - I'd already done some of work in that area previously but it needs to be resurrected and completed like HDMI. (That means it may take a while )

Wuerfel_21 · 2025-09-20 11:20

Should be easy to get Tempest 2000 and P1CC into the mix, they should just werk ( though t2k has rather interesting build requirements)

(I'm once again busy in other endeavours today, possibly involving black magic and board games, so probably no real-time tech support on those - still haven't had time to pull out the logic analyzer setup for this, either)

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