Why are useful 'secret' instructions secret?
So I took a look at the secret undocumented instructions that are on the SX chips. A few of these are very useful... Specifically:
I can understand how if these are misused then they can really break debugging. However, using them in the way I have described (to change the return context inside of an ISR) shouldn't have any adverse consequences for debugging.
The ability to preform context switches in an ISR is extremely useful. I feel like I just got an early Christmas present! I would consider this capability to be a selling point for the SX, but it's SECRET!
Why are these very useful instructions not documented? Why do they have to be "secret"? Can't they just be documented officially with stern warnings about the consequences of misuse?
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darco
www.deepdarc.com/
- pushW/popW
- pushSTAT/popSTAT
- pushFSR/popFSR
- pushPC/popPC
I can understand how if these are misused then they can really break debugging. However, using them in the way I have described (to change the return context inside of an ISR) shouldn't have any adverse consequences for debugging.
The ability to preform context switches in an ISR is extremely useful. I feel like I just got an early Christmas present! I would consider this capability to be a selling point for the SX, but it's SECRET!
Why are these very useful instructions not documented? Why do they have to be "secret"? Can't they just be documented officially with stern warnings about the consequences of misuse?
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darco
www.deepdarc.com/
Comments
When in the interrupt, you first store the previous state into a bank with a series of POP's and MOV's. Then you PUSH previously stored registers (for a different thread) back into the stack. Then, when you do a RETI or RETIW, you start up in the other context.
Another simplified method (only supporting 2 threads) would be to do one register at a time, and use 'swap' to move the register states to and from the bank. (This makes bookkeeping trivial)
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darco
www.deepdarc.com/
Are you talking about previous discussion on this topic?
In my reading, Peter V. gets a lot of credit for teasing out the hidden instructions, and writing mutli-thread code that takes full advantage of it, maintains register/start/stop/end task threads with multiple run rates, etc. But he's a genius
Discussion of secret instructions, and de-secreting them:
http://forums.parallax.com/showthread.php?p=519814
Example of SX/B mainline program using Peter's tasks in ASM w/"secret" instructions:
http://forums.parallax.com/showthread.php?p=618368
There's other posts related to this floating around the forums; a search will turn up lots of references.
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When the going gets weird, the weird turn pro. -- HST
Post Edited (Zoot) : 12/17/2007 11:31:54 PM GMT
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darco
www.deepdarc.com/
These instructions certainly could be incorporated into the SX datasheet, but maybe they're not the best selling points considering they have impacts on debugging capability. It's not intentional that they're formally undocumented - perhaps it's just that the forums gave us a way of keeping these cool little "secrets" unoffical.·The datasheet could include them if you wanted it to.·We'll respond to our customer requests, and so far·I think your request is the first one.
Thanks for·contributing to the·forums.
Ken Gracey
Parallax, Inc.
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darco
www.deepdarc.com/
Instead of adding these "secret" instructions directly within the SX datasheet it might just make more sense to create more of an official Addendum or Application note documenting these extra instructions. Stern warnings can be added about issues with debugging so that they will be used with care. I think that the issue darco brought up was valid and was more that these instructions are only documented on the forums. If you hadn't heard about them before you may not expect them to exist or know where to start looking for them. These are instructions that many advanced users of the SX chips would find useful as Peter V. has done such a fantastic job of illustrating.
I think an ideal solution might be to gather up all the specifics on these extra undocumented instructions, apply the standard Parallax formating to the document, and post it as a pdf download as a link right along with the SX datasheets. That way it is easily available for anyone looking for data on the SX. It's all in one place. If some of the examples that Peter v. has posted on the forums could be added to the document as well it could make a very useful Application Note indeed.
Since most of the concern with the use of these instructions seems to focus on potential issues with debugging it should probably also be noted that this really shouldn't be an issue with users of the SX-Blitz since it can't perform debugging anyway.
Does anyone know if G
As far as application notes concerns, my TaskSwitch library for C4SX
http://forums.parallax.com/showthread.php?p=673332
is a fully working example that uses most of the secret instructions.
regards peter
In the SX48, the MODE register is also saved and restored.
The hidden instructions push and pop PC, W, FSR, and STAT.
Does anyone know if there are also push and pop of the MODE on the SX48.
I believe there are still a couple of undefined opcodes (00A & 00B).
Has anyone tried to see if these are push/pop MODE?
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Paul Baker
Propeller Applications Engineer
Parallax, Inc.
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When the going gets weird, the weird turn pro. -- HST
The two unaccounted for instructions do not affect the M register ..... too bad. When I get some more time I'll do some more testing; perhaps we can discern what they do. I can't believe they were just left empty!
While we're on giving credits, it's true that among others - Ken Gracey in particular- I was instrumental in getting these instructions released on the forum, but I owe my interest in them to websites by Lauren Blaney and Richard Ottosen who published some information on these many years ago.
I have developed their use to implement a full-blown preemptive task switcher with 1 uSec resolution, and able to run any (reasonable) number of threads all independently. So you can run numerous simultaneous UARTs or other VPs, and time them all independently without much inter-dependence.
Someday I hope to have enough time to work with, and convince the SX/B authors to accommodate and integrate this concept, and do away with that nasty blocking PAUSE instruction.
Cheers
Peter (pjv)