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Possiblity to add more COG ram to Prop II — Parallax Forums

Possiblity to add more COG ram to Prop II

SapiehaSapieha Posts: 2,964
edited 2007-12-09 01:07 in Propeller 1
I still study my processor.
·
In present instruction set of adressing of memory in present COG instructions can not adress anymore as 512 longs.
But there are one·possibility to add more RAM to COG processor.
With only 2 special instructions it is possible to address more memory, retaining·persent instructions and addressing mode add compatibility·in COG.
  1. Long Jump (Long address)
  2. Long Move (8 regs in COG to all of memory) (regs to memory and memory to regs)
·
Diagram coming soon.

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Nothing is impossible, there are only different degrees of difficulty.

Sapieha

Post Edited (Sapieha) : 9/11/2008 2:02:29 PM GMT
1833 x 2397 - 224K
COG.jpg 224.1K

Comments

  • Nick MuellerNick Mueller Posts: 815
    edited 2007-12-08 16:25
    > With only 2 special instructions it is possible to address more memory, retaining persent instructions and
    > addressing mode add compatibility in COG.


    Can't see how to access registers with more RAM.

    Nick

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Never use force, just go for a bigger hammer!

    The DIY Digital-Readout for mills, lathes etc.:
    YADRO
  • SapiehaSapieha Posts: 2,964
    edited 2007-12-08 16:33
    Hi Mike .
    It is said 250KB ram on HUB.
    For more procesing power it is beter more to COG and less to HUB

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Nothing is impossible, there are only different degrees of difficulty.

    Sapieha
  • Mike GreenMike Green Posts: 23,101
    edited 2007-12-08 16:53
    Sapieha,
    We all have our opinions of what would be better or best. The only one that counts is Chip's and he has made it clear that there will be 512 longs of cog memory for each cog on the 2nd generation Propeller. There are all kinds of other constraints on what's possible or doable or preferable or practical. Some of them have to do with the area of the chip required for something, some have to do with the manufacturing process involved, etc.
  • AleAle Posts: 2,363
    edited 2007-12-08 17:02
    A LMM would probably the only way. But as it will have more COGs, more HUB RAM (128k), more I/O PINS (64) and more speed (8X) what we will be able to do is a bit uncertain. But our experience with the Prop I is for sure going to pay off. I hope they thought about some kind of external memory interface. If not, A COG will probably suffice, well solved [noparse]:)[/noparse].

    Anyways it can not come soon enough.

    Sapieha: I really like your sig.
  • BaggersBaggers Posts: 3,019
    edited 2007-12-08 17:11
    Sapieha,

    Don't forget, it will have 256K of RAM ( IIRC ) and can therefore using various methods you can bring in extra instructions like in the Large Model Mode, that people are working on for Prop1, with 256K of ram and a processor 8 times faster, this shouldn't really be an issue, but if you truely want more ram for your program, then either add extra ram and stream code in from that, like Andre's H512X SRAM addon, or failing that use another processor?

    Just out of curiosity, what is it you need all those extra instructions for? I know it'll be handy to have more cog ram, but it's a fair trade for the performance this microcontroller has.

    I suppose variables / read/write access could still be restricted to <512 and just have instructions >512 and an use call pointer instead of call #, and that would allow >512 longs keeping current instruction set.

    Baggers.
  • Nick MuellerNick Mueller Posts: 815
    edited 2007-12-08 17:24
    > I suppose variables / read/write access could still be restricted to <512 and just have instructions >512

    And self-modifying code?

    Nick

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Never use force, just go for a bigger hammer!

    The DIY Digital-Readout for mills, lathes etc.:
    YADRO
  • SapiehaSapieha Posts: 2,964
    edited 2007-12-08 18:08
    Hi ALL.

    My model use.
    Bank model with 8 dedicated regs in one bank to move variables from one bank to another and long jump to acces code in bank's.
    And stil have compatibility with old Prop I code.

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Nothing is impossible, there are only different degrees of difficulty.

    Sapieha
  • hippyhippy Posts: 1,981
    edited 2007-12-08 18:31
    Extending Cog Ram, by banking and other means, has been discussed in the past. The bottom line appears that it is not going to happen for Propeller 2 no matter what merit there may be in having it.

    http://forums.parallax.com/showthread.php?p=669485
    http://forums.parallax.com/showthread.php?p=678552

    With an eight-fold increase in speed, faster hub access, more cogs and more memory, Large Memory Model programming is a practical and a feasible mechanism to overcome cog memory limitations for most cases.

    The current issues with LMM are not particularly technical nor hardware related but a matter of not having the right tools available to make it easily realisable and usable. There are plenty, and a variety, of good ideas out there and, in time, solutions will arrive.

    Post Edited (hippy) : 12/8/2007 6:36:25 PM GMT
  • SapiehaSapieha Posts: 2,964
    edited 2007-12-08 19:06
    Hi hippy.

    Thanks for links.

    But it is slightly different way.

    In my model it is posible tu run both code and store data.
    In entire memory block 512*X block´s
    This open posiblites to run X-diferent intrerpreters on same prop.

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Nothing is impossible, there are only different degrees of difficulty.

    Sapieha
  • SapiehaSapieha Posts: 2,964
    edited 2007-12-08 23:50
    Hi.

    Added Memory model Diagram.
    And Instructions to add to COG assembly

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Nothing is impossible, there are only different degrees of difficulty.

    Sapieha
  • Paul BakerPaul Baker Posts: 6,351
    edited 2007-12-09 00:40
    There will still be 512 longs in each cog, there will be a block move function to help allievate the bottleneck wrt hub memory.

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    Paul Baker
    Propeller Applications Engineer

    Parallax, Inc.
  • SapiehaSapieha Posts: 2,964
    edited 2007-12-09 01:07
    Hi Paul.

    It is only my possible resolve to have more durability on yours Processor.
    It giving more power than yours resolve.

    It is not my problem but I thinking if your want trade away more yuor should construct Powerfull Processor.
    You writing "there will be a block move function" it not solve Fast Buffers And more advanced programings algoritms.
    And more advanced Interpreters in only 512 longs with Propellers FastSpeed but only interpreters in same class as Spin.
    Spin is good interpreter but its speed is not good.

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    Nothing is impossible, there are only different degrees of difficulty.

    Sapieha
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