Suggested additions to the assembly documentation
I find the Propeller manual to be a bit terse/confusing on the instruction encoding fields (p. 349); I had to think a bit when reading the ZCRI and CON fields.
Could these be expanded upon a bit in the next revision? For example:
Opcodes follow a standard format consisting of five fields:
The bits comprising the ZCRI field have the following meaning:
The CON field contains four bits which have the following meaning:
Also, I think the indicators for the ZCRI and CON fields are incorrect or misleading for most instructions (or I'm grossly misreading p. 348). For example, ABS specifies an encoding in the form:
INSTR ZCRI CON DEST SRC
101010 001i 1111 ddddddddd sssssssss
The way I read this, CON must be 1111 and ZCRI must be either 0011 or 0010. I think this should be:
INSTR ZCRI CON DEST SRC
101010 ???i ???? ddddddddd sssssssss
Is this correct?
Could these be expanded upon a bit in the next revision? For example:
Opcodes follow a standard format consisting of five fields:
- INSTR (bits 31:26) - specifies the instruction being executed.
- ZCRI (bits 25:22) - specifies the write effects of the instruction and meaning of the src field.
- CON (bits 21:18) - specifies the conditions in which the instruction is executed.
- DEST (bits 17:9) - specifies the destination register for the instruction.
- SRC (bits 8:0) - specifies the source register or immediate value for the instruction.
The bits comprising the ZCRI field have the following meaning:
- Z (bit 25) - the contents of the cog's Z (zero) flag will be affected by the instruction.
- C (bit 24) - the contents of the cog's C (carry) flag will be affected by the instruction.
- R (bit 23) - the contents of the destination register will be overwritten by the instruction.
- I (bit 22) - if 1, the SRC field contains an immediate value; if 0, the SRC field specifies a register whose contents are used as the value.
The CON field contains four bits which have the following meaning:
- Bit 21 - if set, the instruction will be executed when C=1 and Z=1.
- Bit 20 - if set, the instruction will be executed when C=1 and Z=0.
- Bit 19 - if set, the instruction will be executed when C=0 and Z=1.
- Bit 18 - if set, the instruction will be executed when C=0 and Z=0.
Also, I think the indicators for the ZCRI and CON fields are incorrect or misleading for most instructions (or I'm grossly misreading p. 348). For example, ABS specifies an encoding in the form:
INSTR ZCRI CON DEST SRC
101010 001i 1111 ddddddddd sssssssss
The way I read this, CON must be 1111 and ZCRI must be either 0011 or 0010. I think this should be:
INSTR ZCRI CON DEST SRC
101010 ???i ???? ddddddddd sssssssss
Is this correct?
Comments
And a very clever explanation of the working of the 4 codition bits!
WRT your last example: R = 1 is used in the manual whenever a result is written back by default (in contrast to instructions as CMP or JMP). However this is inconsistent when R is an additional flag augmenting the opcode bits to differ between e.g. WR.. and RD.. In those cases it it is not valid to state either NR or WR.
Not entirely. The ZCRi = 001i as currently given indicates if there will be a default WC, WZ or NR applied to the instruction or not. R=0 and there is an implied NR, R=1 and there is no NR and it must be manually written to not write the result.
I partly agree with the '?' for Z and C as meaning "outcome depends on result of execution" (- could mean no change ), but what's currently given represents what the default opcode value is which will be put in code space if no conditional and no effect is used.
Changed : I've changed my mind about the above striken-thru. The ZCR indicate what will happen, whether C or Z will be altered or result written and for Z and C it doesn't matter if the instruction execution affects Z or C or not. The bottom line is that what's needed is two separate tables, one which shows default opcode values ( as we have now ) and a another which indicates which flags can be affected by a particular instruction.
Post Edited (hippy) : 12/4/2007 7:21:53 PM GMT
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Paul Baker
Propeller Applications Engineer
Parallax, Inc.