JTAG Programming using a BASIC Stamp

nvbob

I want to program a Xilinx CPLD with a BASIC Stamp.· It seems like a pretty easy interface which uses a Clock, Data_In, Data_Out, and a Mode_Select signal.

From what I have read, the·device (CPLD) reads·Data_In on the rising edge of the Clock, the device puts Data_Out on the falling edge of the Clock.· The Mode Select determnes how the device will interpret the data.

Does anyone have experience with using the JTAG (TAP) interface with a BASIC Stamp?· Coule the SERIN and/or SEROUT functions be used?

Thanks,

Bob

Bruce Bates

nvbob -

SERIN/SEROUT will NOT work for this kind of application as you have synchronous serial communication, not asynchronous serial communication. SHIFTIN/SHIFTOUT may do the trick for you.

Regards,

Bruce Bates

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nvbob

Thansk for the reply.· I''ll take a look at the shiftin / shiftout.

Bob