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BS2 IO pin off state — Parallax Forums

BS2 IO pin off state

Jason OJason O Posts: 16
edited 2007-11-19 14:06 in BASIC Stamp
Hello,

Could someone tell me what state the IO pins on the BS2 are in when the chip gets cut off? Are they connected t ground or floating high Z?

Thanks,
Jason O

Comments

  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2007-11-17 21:17
    What, exactly, do you mean by "cut off"?

    -Phil
  • Mike GreenMike Green Posts: 23,101
    edited 2007-11-17 23:25
    Jason,
    If you are asking "what happens when the power to the Stamp is off, but there's power to other circuitry?", the answer is "it's not clear".

    There are protective diodes connected in reverse from the I/O pins to both Vdd and Vss. Depending on the voltage applied to the I/O pin,
    it's possible for the processor to be partially powered from this connection and anything could happen from other I/O pins having voltages
    on them to actual damage to the chip. The Stamp is not designed to be operated this way and generally, normal power should be applied
    to the Stamp before or at the same time as power is provided to other circuitry attached to the Stamp. Exceptions include devices
    specifically designed for this use like real time clocks or battery-backed RAM.
  • Jason OJason O Posts: 16
    edited 2007-11-19 12:53
    Hi Mike,

    That makes sense. I'm asking this because I'm trying to determine if I should put some pullup or pulldown resistors on any of the IO pins that are connected to other digital circuitry. I'm not expecting that the Stamp will ever be powered down when other chips are on, but I just want to plan for the worst case scenario. I have a 3-8 line decoder connected to three of the IO pins (74HC138) and I want to make sure that the inputs are set to 000 in the event that the Stamp goes ballistic and needs to be reset. Would you happen to know what happens to the IO pins during a hard reset of the IC?

    God Bless,
    Jason O
  • skylightskylight Posts: 1,915
    edited 2007-11-19 13:20
    On reset I believe they temporarily revert to inputs and presumably high impedance?
    then to whatever state your program dictates.
  • Mike GreenMike Green Posts: 23,101
    edited 2007-11-19 14:06
    If you read the Stamp Manual, you'll see that Stamp I/O pins are initialized to inputs which makes them high impedance (and indeterminant to external circuitry). It's generally a good idea to use pull ups or pull downs on any output pin where the initial state is important and on any unused pin (to reduce power consumption if running off batteries). Also look at the descriptions of the NAP / STOP / END statements which discuss this issue.
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