PowerUp and Reset Code in SX/B, RTCC interrupts in SX/B, Global VARS in SX/B
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I'm working on a program that is SX/B in the main program and almost all ASM in the ISR. The (minor) problem I was having on reset is that the ISR would start rolling before my own SX/B code at the start of the program had initialized things for me properly. For a quick workaround, my Start: SX/B code initializes a ready flag, an the ISR skips to it's own end until that bit is set.
Since SX/B is so phenomenally convenient, I hadn't peeked at the generated startup code too closely until last night. So here's the conundrum -- it seems that either I need to do my work around, or not use SX/B because even with NOSTARTUP my ports and RTCC and such get set by the SX/B generated code *before* my user entered code appears in the list file. Or, I guess come up with more elegant code that start off in zero state better? Is that right?
Quasi-related -- I've been playing with RAM banks and getting feel for working with indirect reading of registers. If the lower half of each ram bank is *always* the "global" vars ($0-$F), then in an SX/B program I am limited in my "true" global vars because of lot of the global ram bank is used by the param vars and such. 4 free global bytes by my count. I realize the upper half of bank 0 is quasi-global in SX/B because SX/B seems to always presume a "return" to bank 0, but again, since I don't really want to sacrifice the loveliness of SX/B I want to know what my constrictions are.
Last newbie question -- in the SX/B startup code there are "mirror" registers for the ports that get setup? Like TRIS_A maps to $FA (if I remember correctly). $FA -- where is that? Are those special registers in the SX or what?
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When the going gets weird, the weird turn pro. -- HST
Post Edited (Zoot) : 10/26/2007 11:37:14 AM GMT
Since SX/B is so phenomenally convenient, I hadn't peeked at the generated startup code too closely until last night. So here's the conundrum -- it seems that either I need to do my work around, or not use SX/B because even with NOSTARTUP my ports and RTCC and such get set by the SX/B generated code *before* my user entered code appears in the list file. Or, I guess come up with more elegant code that start off in zero state better? Is that right?
Quasi-related -- I've been playing with RAM banks and getting feel for working with indirect reading of registers. If the lower half of each ram bank is *always* the "global" vars ($0-$F), then in an SX/B program I am limited in my "true" global vars because of lot of the global ram bank is used by the param vars and such. 4 free global bytes by my count. I realize the upper half of bank 0 is quasi-global in SX/B because SX/B seems to always presume a "return" to bank 0, but again, since I don't really want to sacrifice the loveliness of SX/B I want to know what my constrictions are.
Last newbie question -- in the SX/B startup code there are "mirror" registers for the ports that get setup? Like TRIS_A maps to $FA (if I remember correctly). $FA -- where is that? Are those special registers in the SX or what?
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
When the going gets weird, the weird turn pro. -- HST
Post Edited (Zoot) : 10/26/2007 11:37:14 AM GMT
Comments
If you look in the output listing (use Ctrl-L to view) you'll see that the shadow registers for the TRIS registers (on the SX28) are at $FA - $FC.
The TRIS shadow locations are needed because on the SX28 you cannot read the TRIS hardware registers. They are write-only. So you cannot set or clear a single bit on them.
By storing the TRIS value in ram (nothing special about those addresses, just the last address in RAM) allows you to set or clear bits.
Bean.
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Yes, I'm using SX/B for calculating the ISR rate, initializing vars and ports, main program and functions; the ISR and some of the bulkier parts of the main program are ASM. I don't think there's a need to post the code -- it's all doing what I expect, I've just been trying to go through some of the generated assembly and see why certain things are happening. Getting at the guts, as it were. In my case, one part of the ISR checks the state of a detector while running some counters and such, and the detector doesn't quite settle on power-up before the ISR kicks in. On reset it's OK.
I started to do my own startup code in ASM to get the initialization order the way I wanted it and learn my M modes, but to be honest, I stopped (for now) because SX/B is just *so* dang convenient and error-free for that kind of work.
On the port map registers for SX28 -- sounds like these are software maintained pin bitmaps so that the program's own changes to the ports can be recorded (for use in subsequent bitmasks when writing to the pins). Super clever. I need to look at the generated list file more closely
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When the going gets weird, the weird turn pro. -- HST
See my comments in .src listing below. *IF* my reading is correct, the RTCC is set to run in the OPTION register BEFORE pullups are set.
Which would explain my results -- my IR detector was giving me noisy results (I'm sure you've read the many posts on this topic at all the forums). Part of my soution was using the internal pullup on the input pin (which cut down on false lows quite a bit). So on soft reset, it's not generally a problem because the pin is already set to pullup. But on powerup, it's not. Since my ISR checks the detector and sets some states for the main program, it caused unexpected behavior.
This code is untouched from what SX/B generated
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When the going gets weird, the weird turn pro. -- HST
Otherwise, don't use the rate parameter on the INTERRUPT line and set OPTION manually.
Bean.
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My goal is to live forever...Or die trying.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
www.hittconsulting.com
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