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Need ckt to monitor for specified pulse width then set flipflop — Parallax Forums

Need ckt to monitor for specified pulse width then set flipflop

EducateUSAEducateUSA Posts: 13
edited 2007-10-23 01:05 in BASIC Stamp
I am looking for a circuit design to read a BS2·data line, and look for a specified pulse width, then set a flipflop which will then enable another chip until the same pulse width is seen again.· All other signals on the data line should be ignored.· Ideally, I would like to be able to put several of these "tuned" circuits on a single data line.· I have been trying to create the circuit with a 555 with no success.· Can anyone help me?
Sincerely,
Mark

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Sincerely,


Mark Hass, Director
EducateUSA
markhass@EducateUSA.com

Comments

  • JSWrightOCJSWrightOC Posts: 49
    edited 2007-10-14 03:01
    The first thing that comes to mind would be to use two RC circuits, feeding two Schmitt trigger CMOS gates. One is tuned to the lower limit, the other tuned to the upper limit. Using some simple combinational logic it should be easy to generate a clock pulse when the lower limit gate is triggered but only when the upper limit gate is not triggered. Probably by edge detecting the trailing edge of the pulse coming from the lower limit gate, and using the output of the upper limit gate as an inhibit - this way, when an extra long pulse is received, both upper and lower limit gates are activated, and so the edge-detected output of the lower limit gate is inhibited. You might be able to do all this with one quad CMOS package, some resistors, capacitors, and recovery diodes (1N914 for example). The resulting output would be a brief pulse generated only when the input pulse width is above the lower limit, but below the upper limit.
  • Beau SchwabeBeau Schwabe Posts: 6,568
    edited 2007-10-14 03:22
    Mark Hass,
    Look into the PBASIC PULSIN command.·· Here is a sample program that should get you started.
    ' {$STAMP BS2}
    ' {$PBASIC 2.5}
                                          'Define Variables
    '##################################################################################################
    RXvalue               VAR   Word
    FlipFlop1             VAR   Bit
    FlipFlop2             VAR   Bit
     
                                          'Define Constants
    '##################################################################################################
    RXPin                 CON   0   'Select which pin you are using for input
    FlipFlop1_Pin         CON   1   'Select first Flip Flop Output Pin
    FlipFlop2_Pin         CON   2   'Select second Flip Flop Output Pin
     
                                          'Initiallize I/O pin directions
    '##################################################################################################
    DIRS = (1<<FlipFlop1_Pin)|(1<<FlipFlop2_Pin)
     
                                          'Main Program Loop
    '##################################################################################################
    MainLoop:
    PULSIN RXpin,1,RXvalue          'Detect Pulsin Width with a 2uS resolution
    SELECT RXvalue
      CASE 50                       'If input width equals 50 ... or 100uS (5kHz) then toggle "software Flip-Flop #1"
        FlipFlop1 = 1 - FlipFlop1
      CASE 100                      'If input width equals 100 ... or 200uS (2.5kHz) then toggle "software Flip-Flop #2"
        FlipFlop2 = 1 - FlipFlop2
    ENDSELECT
    OUTS = (FlipFlop1<<FlipFlop1_Pin)|(FlipFlop2<<FlipFlop2_Pin)      'Set Outputs to reflect software FlipFlops 1 and 2
    GOTO MainLoop
    


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    Beau Schwabe

    IC Layout Engineer
    Parallax, Inc.

    Post Edited (Beau Schwabe (Parallax)) : 10/14/2007 7:40:38 AM GMT
  • EducateUSAEducateUSA Posts: 13
    edited 2007-10-14 03:25
    Thanks.· I have been playing with RC circuits and a couple of 555 timers but haven't figured it out yet.· Do you know of any single chip solution? When I can force myself to look at he darn thing again I will play with your Schmitt triggar idea.· Unfortunately, what seems easy to some, is harder for some of us newbees.

    Thanks again.

    Mark

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    Sincerely,


    Mark Hass, Director
    EducateUSA
    markhass@EducateUSA.com
  • JSWrightOCJSWrightOC Posts: 49
    edited 2007-10-14 04:21
    I have come up with two circuits, based on some criteria. Depending on your specific needs it can be done with one package, otherwise 3-4 logic gates. I haven't tested it, but it should work. Here's the first version: a logic buffer (optional - 74HC4050 for example), two Schmitt-trigger inverter gates (74HC14 for example), and a single AND or NAND (74HC08 or 74HC00 respectively) gate. The logic buffer is there only so that the RC circuits and recovery diode do not load down the input signal line. This is a good idea if you have more than one of these circuits on here, or are using the signal line to drive other devices that are timing and pulse sensitive. Once the pulse is buffered, it is fed to two RC circuits, which have different time constants. The capacitors charge with respect to ground through the resistors, and the lower-limit RC circuit has a recovery diode backwards-connected across the resistor. The output of the lower-limit Schmitt-trigger inverter feeds an edge-detecting RC network with a recovery diode - a series-connected capacitor on the output of the gate is charged through a resistor connected to ground, so in the idle state there is 5V across the capacitor. When the output of the inverter gate goes low, the capacitor is discharged rapidly through the recovery diode connected to ground (which is normally reverse biased), and when the gate's output returns to high once again, the capacitor (relatively) slowly charges through the resistor, resulting in a brief high pulse on the output of the network. This feeds one side of the AND or NAND gate, whose other side is fed by the upper-limit Schmitt trigger inverter. The RC circuit for this inverter does not have a recovery diode, so it will charge and discharge with equal times - this ensures that when a long pulse is received, the output of this inverter will go low and still be low when the edge pulse is generated by the other inverter, and hence the pulse will not be transmitted through the AND or NAND gate.

    The second version uses the exact same circuit, except all four gates are Schmitt-trigger NAND gates, such as a 74HC132. For the buffer and inverter stages, tie the unused side of the NAND gate high. This means you can do everything with one 14-pin DIP. The only requirements are that the input pulse either be negative going (high-low-high) or you omit the input buffer, in which case you would use a positive going (low-high-low) input pulse, and that the output pulse generated would have to be inverted logic (in the example above, using a NAND gate, creating a high-low-high output). You can still use this for driving all edge-clocked logic. Leaving the clock in one state or the other would not affect operation of the flip-flop. If you omitted the input buffer, you could use the remaining gate as an inverter to get your low-high-low output, if that's what you need.

    You will have to play with the resistor and capacitor values to get them in the time constant range that you need them, but it should be pretty straightforward. A good choice for the edge-detecting circuit would be 100K and 4700pF, 2200pF would be better if you are dealing with shorter input pulse durations. This makes a fairly narrow pulse, but is plenty to drive clocked logic.

    If this sounds confusing, I can provide a schematic in the morning!
  • EducateUSAEducateUSA Posts: 13
    edited 2007-10-15 03:40
    Wow! Your help is wonderful.· I will start drawing up the circuit tonight, and as usual, I will need to play with it before I can really understand how it is designed.· It sounds straight forward enough.·· I appreciate your help.· I wish I had had this site for support·when I was studying electronics, but that was before the Internet, and what I had was a big blue box called ISSIS, 16 switches, PLM, and REALLY big floppy disks.· If you do find the time (when you really should be doing real work during the week), I would like to compare your circuit with the one I breadboard.

    Sincerely,

    Mark
  • EducateUSAEducateUSA Posts: 13
    edited 2007-10-15 13:23
    Good morning JSWrightOC,

    After looking at the circuit it seems to me to need yet a third timing mechanism to reset the timer if the period in which the data line is high is greater than the desired pulse width necessary to set the flip flop (which is used to enable a chip select). Currently the gate appears to reset correctly if the pulse is too short, and always fire if the line is held high long enough for both RC timers to charge to threshold voltage after the minimum pulse width has been reached. If the width of the pulse is longer than a predetermined pulse, I think I need to reset the second RC (no diode) and start monitoring again for a pulse that is not too short, and not too long, -- just right [noparse]:)[/noparse] . Am I understanding your circuit correctly?

    Respectfully,
    Mark

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    Sincerely,


    Mark Hass, Director
    EducateUSA
    markhass@EducateUSA.com
  • Beau SchwabeBeau Schwabe Posts: 6,568
    edited 2007-10-15 15:19
    EducateUSA,
    ·
    Here is something along the lines that might be useful.· In principle it is similar to what you want to do with the Pulse Width, only it uses frequency... basically you setup two RC's·for·a specific frequency to create a "window".· If the input frequency is within the window that you set by the RC time constant, then the·output of a Flip-Flop(1/2 MC4013B) indicates·if the signal is inside our outside of the window.· This output then can easily be detected by a Stamp.· Also, you can use a digital Pot controlled by the Stamp to change the "R" value in the RC time constant to adjust the frequency range.· I would think that the concept of this article could be modified to detect a "one-shot" pulse width rather than a frequency.· In fact you may not need to change anything at all,· it might also work well with simply receiving a pulse width.
    ·

    The attached article was part of a special edition publication in 1992 from "ELECTRONICS NOW" magazine titled "NEW IDEAS 44 great circuits for electronics experimenters and hobbyists."
    ·
    ·

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    Beau Schwabe

    IC Layout Engineer
    Parallax, Inc.

    Post Edited (Beau Schwabe (Parallax)) : 10/15/2007 3:31:31 PM GMT
    2258 x 2296 - 1M
  • Tracy AllenTracy Allen Posts: 6,664
    edited 2007-10-15 15:40
    This would be a good application for an 8 or 6 pin PIC chip. If the pulses are on the length of millisecond or longer, it could detect the leading edge, time the duration, and set or unset the output. It wouldn't work for microsecond pulses.

    You said "look for a specified pulse width". What widths, quantitatively, and how would they need to be "specified"?

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    Tracy Allen
    www.emesystems.com
  • Beau SchwabeBeau Schwabe Posts: 6,568
    edited 2007-10-15 15:46
    Tracy,
    You said...
    This would be a good application for an 8 or 6 pin PIC chip
    Or a second Stamp... as I indicated in my first post.

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    Beau Schwabe

    IC Layout Engineer
    Parallax, Inc.

    Post Edited (Beau Schwabe (Parallax)) : 10/15/2007 3:51:21 PM GMT
  • Tracy AllenTracy Allen Posts: 6,664
    edited 2007-10-15 16:26
    Yes, a second BASIC Stamp, but it might be "overkill" if he needs several of these.

    The way I read the request, the BASIC Stamp main loop would be (assuming a selected pulsewidth of 1 millisecond +/- 0.1)

    MainLoop:
    PULSIN RXpin,1,RXvalue          'Detect Pulsin Width with a 2uS resolution
    RXvalue = RXvalue*2
    IF RXvalue > 900 AND RXvalue<1100 THEN TOGGLE flipflop1  ' 1ms pulse with tolerance
    GOTO MainLoop
    



    I was wondering about the selection of pulsewidth. That might imply some kind of user interface, a knob or a keypad, to select the width at run time.

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    Tracy Allen
    www.emesystems.com

    Post Edited (Tracy Allen) : 10/16/2007 12:00:08 AM GMT
  • JSWrightOCJSWrightOC Posts: 49
    edited 2007-10-16 03:03
    I realize that there are 101 ways we could tackle this problem. I personally believe in using the simplest solution to solve a problem. Defining "simple" may be up for debate, but I prefer hardware solutions over software ones, especially if both seem equally un-complicated. While the hardware solution may technically take up slightly more board space (14-pin DIP + passives versus 8-pin DIP + a couple components) it would be far easier for someone who is just trying to build and adjust a simple circuit to mess with the hardware solution. If we were to mass produce a product containing this bit of technology, then perhaps the software solution would be in order (cheaper to impliment possibly, but even that is debatable) - but we're probably talking about a one-off project here. That and I'm a hardware junkie; I prefer hardware implimentations over software ones. smile.gif

    Not to mention any applications involving a BASIC stamp as a solution would require 100% dedication of the Stamp, and then you've got the timeouts to deal with....and even if you loop the instruction as a workaround, you can still miss a pulse while it's loading and executing the loop instruction...etc. etc.
  • JSWrightOCJSWrightOC Posts: 49
    edited 2007-10-16 03:19
    Oops, I missed a reply.

    Like I said, I haven't breadboarded the circuit yet, but I did draw it up and in theory it should work. The first part of the circuit you said is working correctly; I assume that you installed the recovery diode as mentioned. This is there so that the capacitor is discharged quickly on the trailing edge of the input pulse. The second (upper limit) RC circuit has no such recovery diode, and so the charge-discharge times are equal. This means that once the hysteretic action of the upper limit gate is triggered, it will not reset quickly when the trailing edge of the input pulse is received. This ensures that its output will stay low long enough to inhibit the pulse generated by the network on the lower limit gate's output. Don't forget this last RC circuit - there should be a total of three. The entire circuit should be allowed to rest for at least the duration of the input pulse, before another pulse is fed to it.

    If you use this to drive a "T" flip flop (T for Toggle - as in a binary divider) which is always reset when the circuit powers up, you should be able to index, in your software, when a device's chip select is selected, and when it is not - since the flip-flop always initializes in a known state. Another option is perhaps you could use individual pulse-decoder circuits to set a set-reset flip flop, and then use a common reset line, which would take an additional pin, or you could use another pulse decoder circuit to drive a common reset line. Could you provide a schematic or drawing of the circuit you have built?
  • EducateUSAEducateUSA Posts: 13
    edited 2007-10-16 03:57
    Thank you all for your support.

    I need to spend some time understanding the different methods presented to get the job done. Playing with 555s and Schmitt triggers has been fun, but figuring out how to make the circuits work has taken up my evenings for the past week. In the mean time, I need to get my job done, or I won't have $$ to keep buying these toys, let alone pay my mortgage.

    I am still trying to understand how to stop the trigger and reset the both RC timers when I have a pulse that is too long, but I think I’ll be able to work it out. It is interesting that something so easy to do with multiple pins, seems soooo difficult to achieve using discrete logic. Probably I just need to study and practice more. Funny, - that is what I so casually tell my students. If nothing else, this exercise has reminded me how difficult it is to be a student and really think. Managing teachers is easier. Thanks again to everyone.

    Respectfully,
    Mark, Director
    EducateUSA.com
    .

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    Sincerely,


    Mark Hass, Director
    EducateUSA
    markhass@EducateUSA.com
  • metron9metron9 Posts: 1,100
    edited 2007-10-16 05:00
    If you answer the question Tracy asked I could provide a solution for about $1.00 that would give you two inputs and two outputs with the chip on the left. From less than a microsecond pulse to more than a thousand years but you have to specify some kind of range.

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    Think Inside the box first and if that doesn't work..
    Re-arrange what's inside the box then...
    Think outside the BOX!
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2007-10-16 05:26
    Since the control output is emanating from a Stamp, why limit yourself to pulse-width detection? Consider, for example, the DS2405 One-Wire addressable switch. This device is housed in a three-pin TO-92, can be bussed with similar devices on a single I/O line, and has an open-drain output that can be turned on and off using the One-Wire protocol. This protocol is built into the BS2p-series BASIC Stamps, but I'm not sure it's possible to emulate it with a BS2.

    -Phil
  • EducateUSAEducateUSA Posts: 13
    edited 2007-10-20 03:19
    The ds2405 looks interesting but other posts seem to indicate that it doesn’t talk to a BS2sx.· Anybody know for sure?· I think it might be easier than using several RC circuits to decode an address on a single line.

    I don't really know what pulse width I will need to look for if I go ahead and toggle my flip flop using PWM.· After learning of the ideas of frequency modulation and 1-wire, I think there may be easier ways to get the job done. Since I don't have lots of evening to play with this stuff, I prefer to keep my circuit simple, or as I was onec told to "KISS" it. [noparse]:)[/noparse]

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    Sincerely,


    Mark Hass, Director
    EducateUSA
    markhass@EducateUSA.com
  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2007-10-22 16:03
    Mark,

    The DS2405 is a 1-wire device and as such would require a BS2p series to talk to it.

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    Chris Savage
    Parallax Tech Support
  • EducateUSAEducateUSA Posts: 13
    edited 2007-10-23 01:05
    Thanks.
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