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74HC595 communication question [Resolved] — Parallax Forums

74HC595 communication question [Resolved]

D FaustD Faust Posts: 608
edited 2007-09-17 20:41 in BASIC Stamp
How do·I communicate with a shift register such as the 74HC595 from a stamp?··Link to datasheet: http://www.fairchildsemi.com/ds/MM/MM74HC595.pdf I'm not sure exactly how to read the diagram, but it looks like·I have to pulse the clock line?· I think I need to use shiftin and shiftout, but i'm not sure what I have to do to the other lines.

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Post Edited (D Faust) : 9/17/2007 8:43:57 PM GMT

Comments

  • NewzedNewzed Posts: 2,503
    edited 2007-09-16 21:49
    DFaust, here is a test code for the 595 that may help you.

    Sid

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    That is why they call it the present.

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    bs2
    bs2
    595 Test.bs2
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  • UnsoundcodeUnsoundcode Posts: 1,532
    edited 2007-09-16 21:52
    There is also someone working on a 74H595 from a Stamp Works article at this link http://forums.parallax.com/showthread.php?p=674940

    Jeff T.
  • D FaustD Faust Posts: 608
    edited 2007-09-16 23:23
    Thanks, Newzed·that is what I was looking for.· I heard that the clock pin can be shared with other devices, is this true.· Also can the latch be shared?· I am really trying to conserve·IOs.· There is a 74HC parallel to serial does anybody have example code for that?· Same questions about sharing IOs apply.· Thanks

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END
  • NewzedNewzed Posts: 2,503
    edited 2007-09-16 23:31
    If you are daisy-chaining, the clock and latch pins can be shared.· Tie Pin 9 of the first 595 to Pin 14 of the second 595, Pin 9 of the second to Pin 14 of the third, and so on.

    Sid



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    Yesterday is history, tomorrow is a mystery, and today is a gift.

    That is why they call it the present.

    Don't have VGA?
    Newzed@aol.com
    ·
  • D FaustD Faust Posts: 608
    edited 2007-09-16 23:37
    Why can't I just have two (or however many) wire from one stamp pin to latch and two wires from another pin to the clk of two 74HCs? Can these be shared with the 74HC parallel to serial?· What about sharing clock and latch·with an ADC?

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END

    Post Edited (D Faust) : 9/16/2007 11:45:43 PM GMT
  • NewzedNewzed Posts: 2,503
    edited 2007-09-16 23:43
    Why can't I just have two (or however many) wire from one stamp pin to latch and two wires from another pin to the clk of two 74HCs?

    UYou can do that.

    ·Can these be shared with the 74HC parallel to serial?

    No.

    Sid

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    Yesterday is history, tomorrow is a mystery, and today is a gift.

    That is why they call it the present.

    Don't have VGA?
    Newzed@aol.com
    ·
  • D FaustD Faust Posts: 608
    edited 2007-09-16 23:44
    Thanks.

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END
  • D FaustD Faust Posts: 608
    edited 2007-09-17 01:11
    Would anybody care to elaborate.· In the picture at the bottom of the first page of the datasheet I do not see a pin labled latch.·· Which pin·is the right clock?·

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END
  • pwillardpwillard Posts: 321
    edited 2007-09-17 03:12
    The way to think about working with the 74hc595... is if you want more outputs, you chain them. To make ANY changes on the output pins, you compute the total·change, then update ALL registers and then latch to the output.

    So, if you have 1·shift register chip·with 8 outputs, you shiftout 8 times then LATCH. If you want more,·you feed the highest output from the first latch to the·serial input of the second latch and·then to update, you shiftout 16 and then LATCH the result.

    Am I making sense?

    Think of it like stacking plates... to get a pattern in a 16 plate stack of red and blue plates... you need to stack the full 16 plates each time you make a change to be sure they are in the right order because everything you do is "sequential".· You can't just swap out plate #5 for example... your clear out the pile and start stacking over again.


    In the case of the 595, what they are showing you is that the RCK and G are respnosible for LATCHING the contents of the registers to the output pins. G needs to be low and RCK triggers the latches on the rising edge of the RCK pin change as long as you are not clearing the registers. USE RCK as your latch, SER as your data in and SCK as your clock pin.

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    There's nothing like a new idea and a warm soldering iron.

    Post Edited (pwillard) : 9/17/2007 1:56:59 PM GMT
  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2007-09-17 15:02
    For a good example of three 74HC595's being daisy chained and sharing the latch please see the following from the Completed Projects. Besides the sharing there the clock/data lines are also shared among a DS1302, DS1620 and MAX7219. Code and Schematics are provided. I hope this helps. Take care.

    http://forums.parallax.com/showthread.php?p=552892

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    Chris Savage
    Parallax Tech Support
  • D FaustD Faust Posts: 608
    edited 2007-09-17 18:48
    So I have to shiftout the bytes on the shared data line nad use the shared clock line.· After I send a 10 microsecond pulse on the individual latch line.· Is this correct?· I cannot read the schematic right now.· I will download the zip reader later, but I'm sure the schematic will help me with the physical connections thanks.· I will only be using one 74HC595 but I might use the 74HC parallel to serial converter.· Can I share the data and clock lines?· Can I not becuase I can't have inputs an outputs on the same line?· Thank you.· Pwillard, I couldn't understand what you said, but thanks for trying.

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  • pwillardpwillard Posts: 321
    edited 2007-09-17 19:20
    You can share latch and clock with all shift registers. You only need 1 serial data line because you chain them to the next device in the stack. So you only need one data line from the Stamp. (3 pins total used on the stamp) The SERIAL input of subsequent registers are fed by the deepest register in the previous chip.

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    There's nothing like a new idea and a warm soldering iron.
  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2007-09-17 20:31
    Okay, you shift out your 8-bits (1 byte) and then pulse the latch line. If you want to add a 74HC165 you just need an additional line for its latch line. So 4 I/O for adding both input and output shift registers. Take care.

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    Chris Savage
    Parallax Tech Support
  • D FaustD Faust Posts: 608
    edited 2007-09-17 20:41
    That's just what I wnated to hear.· Thank you both.· pwillard, now you are making sense.

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