Illegal or undefined instructions

Ale

Hallo all,

The question is easy: What happens during the execution of an illegal (also known as undefined) instruction ? (assembler)

I did not test this, but I wanted to know the official statement

Some cases:

cmps y,x wr
cmpsx y,x wr

djnz a,#label nr

tjz a,#label wr

There are a coumple more, involving also HUB instructions.

Of course it can be tested in real hardware, but it does not mean that I will find out what exactly happens (may be they are ignored!)
All can be obtained with a long $<needed_value> so if the assembler ignores them and replaces them with a nop... they can still be generated!

Thanks,

Ale

hippy

"cmps" and "cmpsx" with a result written are the same as "subs" and "subsx", perhaps more logically viewed as; subtract is a compare when the result isn't written back.

My guess for "djnz a,#label nr" is that it loads a, subtracts one, sets/clears Z, then jumps if Z is clear. Because no result is written the register is left unchanged, it isn't actually decremented, making this a "Jump If Register Is Not Of Value One" instruction.

I'd guess that "tjnz a,#label wr" is the same as without the wr, but I guess it all depends on exactly what's in the 'holding bay' to be written when wr occurs.

Ale

Hippy,

With regard to cmps and cmpsx and subs and subsx, I would tend to agree, but they are different opcodes ! (110000 110001, 110101 110110). Regarding djnz I thought the same. It did not occured to me that maybe they can write once more what they calculated before... for instance in the case of tjz, nothing is _im principle_ calculated... mmm may be I can envision some testing code...

hippy

Sorry, you're right, my mistake - only CMP/SUB, CMPX/SUBX have the same opcode values.

CMP    D,S    100001 000i 1111 ddddddddd sssssssss 
CMPS   D,S    110000 000i 1111 ddddddddd sssssssss
CMPSX  D,S    110001 000i 1111 ddddddddd sssssssss
CMPX   D,S    110011 000i 1111 ddddddddd sssssssss

SUB    D,S    100001 001i 1111 ddddddddd sssssssss
SUBS   D,S    110101 001i 1111 ddddddddd sssssssss
SUBSX  D,S    110111 001i 1111 ddddddddd sssssssss
SUBX   D,S    110011 001i 1111 ddddddddd sssssssss

Ale

I checked twice when I did the simulator... I do not know why they did not merge the two like sub/cmp. Maybe in Prop II they reuse those opcodes and add some nifty new instructions... pipe dream :P

deSilva

Remember that the Prop is a RISC processor. There is no "micro code" performed aware of an instruction as such, but just gates are opened and closed. Thus each instruction will have some effect, according to very logical cnsiderations.

Note thet the effect of DJNZ is well explained in the manual: "DJNZ decrements the Value register and jumps to Address if the result is not zero. When the WZ effect is specified, the Z flag is set (1) if the decremented Value is zero. When the WC effect is specified, the C flag is set (1) if the decrement results in an underflow. The decremented result is written to Value unless the NR effect is specified."