TFT LCD with Propeller

APStech-Attila

Hi!

·· I have to drive TFT LCDs with the Propeller. The·mono VGA module works nice, only I have to add to the code is an extra pin for TFT pixel clock. The clock is derived from the VGA render cog's second counter. (Attach.)

·· If I enter the same FRQx, PHSx and CTRx values both for the VIDEO gen. (CTRA)·and the TFT pixel clock gen. (CTRB) the clock pin will have exactly same PLL setup time as the video gen. so·the TFT pixel clock will be·in snyc with the pixels.

· My problem is how can I adjust the phase of CTRB to invert clock transition? It seems with the CTRB PLL enabled adjusting PHSB register will not have the desired effect. (Looks like the PLL is eating the phase change) Attached there is a source I am currently using, I have setup the the CTRB based on trials. (line 137 will result in falling edge in middle of pixel, line 141 will result in rising edge in middle of pixel) I am not sure wether this "timing" will work on all PChip revisions...

· Generally speaking: how can I adjust the Propeller's PLL enabled ctr's phase to have an EXACT phase difference to another internal counter's (also PLL enabled)·phase? (30MHz range)

Thanks for your idea!

· Attila

cgracey

Attila said...

· Generally speaking: how can I adjust the Propeller's PLL enabled ctr's phase to have an EXACT phase difference to another internal counter's (also PLL enabled)·phase? (30MHz range)

Attila,

Whatever you get to work on one Propeller will work on any other, don't worry.

Since the PLL is multiplying PHS[noparse][[/noparse]31] by 16, and you want a 180-degree flip on the output, you would have to add 1/32 ($0400_0000) to PHSB relative to PHSA. To make this exact, you would have to do the 'mov phsb,phsa', and then add/sub the $0400_0000, while compensating for what would have been added to PHSA while you copied PHSA to PHSB, and for what would have been added to PHSB. This is a little complicated because of the source-read characteristics of PHSA and PHSB. I little hypothesis and experimentation should land you at the right solution, though. I hope this helps.

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Chip Gracey
Parallax, Inc.

APStech-Attila

Thanks Chip!

RoboThespian

Did you get it working?
I have the same problem interfacing to Hitachi 2" LCD screens.

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APStech-Attila

Yes, it's up and running. (We have a 1GHz digital analyser, so it was possible to experiment·to find·the best setup.)

I have problems to automatically adjust pixel clock for 4 color tile modes. However I do not have time to work on this at the moment.

·

RoboThespian

If you dont mind sharing the code - that would be cool
If its a secret - I understand

I have a concept for increasing the colour depth - use an extra cog with another VGA out for lower order bits.
So one cog generates bits 0-1 the other does 2-3, could possibly use 3 cogs and get full 18 bit colour depth for TFT LCD's
My theory is that all the clocks should be in sync so it should work - You are a lot further down the R&D track on this - any thoughts?


Cheers

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_______________________________________
A Little Bit Of Knowledge Is A Dangerous Thing
But How Do you Know What You Don't Know?

mirror

Attila said...
Yes, it's up and running. (We have a 1GHz digital analyser, so it was possible to experiment·to find·the best setup.)

I was able to do similar adjustments using a 100MHz PC based oscilloscope. What I did was connect the leads one way round to the two phase critical signals, then I swapped and connected them the other way round. The reason for doing the swapping is to see if there is·a phase bias in the measurement instrument itself. As it turned out, the oscilloscope was not biased.