Decoupling capacitors
I've noticed that the Parallax boards only have a single 1 uF decoupling capacitor for the two Vdd and Vss pins, whereas one 100 nF capacitor for each Vdd - Vss pair is more usual with other MCUs. What is the reason for the single 1 uF capacitor?
Leon
Leon
Comments
Additionally, you may be overlooking surface mounted capacitors. In many of the surfure mount boards, there are 4 small de-coupling capacitors [noparse][[/noparse]one on each side of the square chip]. Guenther explained some time ago that this was a superior method of noise reduction when compared with one capacitor on a DIP and the radial placement was quite important.
Finally, with 4 layer board construction the two inner layers act to further noise reduction. One is usually Vcc and one is Vss.
So...
You just may have not noticed the capacitors and noise reduction scheme.
In any event, the DIP boards are the only ones that have 'one decoupling capacitor'. For sure,that is the SX-28 board and I believe it is also 4 layer.
I haven't examined the PropStick or Propeller 40-pin DIP boards, but the lower clock frequency might be a reason for the 1uf and the clock is the prime internal source of noise emitted onto the power lines.
This is an area where testing and not pure calculation must provide the best answer.
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Post Edited (Kramer) : 4/9/2007 9:02:27 AM GMT
Leon
Post Edited (Leon) : 4/9/2007 9:24:13 AM GMT
I would have to dig to give you an exact page reference.
Frankly, that text seems a bit frustrated about oscillations in general and I am not sure it is 100% objective. As the authors are university faculty, they may have just had a lot of trouble with students doing sloppy work and having to try to ferret out their problems with such.
You seem to be following mainstream standard philosopy. But, I keep in mind that I should have a way to swap out the decoupling capacitor if a particular value just doesn't seem to work in a given situation.
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Paul Baker
Propeller Applications Engineer
Parallax, Inc.
You need to be very careful with the capacitor on the output of a LDO regulator. If you don't fall within the proper parasitic ESR range supported by the LDO regulator, it will oscillate.
The CPU like all switching logic can draw high currents as they switch for a variety of reasons. One of which is charging/discharging "parasitic" capacitance, this is the capacitance of connections and gate capacitance. Another reason is simply that as one output transistor is turning on the other is still turning off, it might not be much of a delay but there is a period where the sourcing transistor and the sinking transistor of the output are both on or partially on. There is a resultant current spike which if not properly regulated will result in a voltage drop which may affect other parts of the circuit.
Since large currents are required for very brief periods the easiest way to achieve this is with a capacitor which can supply that current right there where it is needed. From the laymans perspective if this capacitor were too far away then the inductance of the connections would prevent that current being dumped when it is needed (later is not an option). That is why the capacitor needs to be of a certain "capacity" to supply that charge, however the larger capacitors exhibit too much ESR and inductance to be of much use. A value of around 10 to 100nf (usually monolithic ceramic) will work well if and only if you have them as physically/electrically close as possible to the supply pins.
It may work without decoupling capacitors but don't be surprised if you have mysterious glitches in the operation of the unit. I've seen many a novice and even uni grads scratch their heads trying to figure out what is wrong with their design
If a picture paints a thousand words then I have hardly drawn a blade of grass.
*Peter*
Post Edited (Peter Jakacki) : 4/10/2007 12:56:16 AM GMT
Check out the anyCap LDO modules from Analog Devices.
Their claim I don't agree with, but they do make finding a capacitor that will work a lot eaisier.
Leon