TRIS oddity with SX/B... Can someone else confirm this behavior??
RobotWorkshop
Posts: 2,307
Hello,
I have run into something odd with SX/B which is a bit confusing to me and perhaps
may be a feature I missed in the documentation. I made the small program below
which demonstrates the issue....
In particular try running this in the simulator and watch the TRIS bits for port B.
They are all set as outputs and should stay that way. If I use the LOW command
it changes the lower nybble of the TRIS port to inputs!! When I use RB.2 then that
pin is an output but the other three bits in the lower nybble are converted to inputs.
If I use a low on RB.5 then it changes all four of the lower four TRIS bits for port B
to inputs.... (At least that is what shows up in the simulator!) This is totally
unexpected.
Is this normal behavior for SX/B or is it a bug in either SX/B or the simulator??
This whole thing came about because I had some random issues with port B which
can now be explained if the program is changing some of the pins on the port back
to inputs. I can add pull up resistors to my circuit as a work around in the meantime
but I shouldn't need them if in fact the port always stayed as outputs as I had expected.
If you try running it just swap the comment on the Latch definition to see how the
TRIS settings react when it shows in the simulator.
Please let me know if you have any idea what the problem may be.
Best Regards,
Robert
' =========================================================================
'
' File...... TRISTEST.SXB
' Purpose... Test TRIS direction settings
' Author.... Robert L Doerr
' E-mail.... rdoerr@bizserve.com
' Website... http://www.robotworkshop.com
' Created... 4 APR 2007
' Updated... 4 APR 2007
'
' Version... 1.00
'
' =========================================================================
'
' Program Description
'
'
' This program is written to test the behavior of the TRIS settings
' in SX/B.
'
' Device Settings
'
' Configure SX48 options and setup to use OSCXT2 (external 20mhz oscillator)
' If using an SX28 then specify: , TURBO, STACKX, OPTIONX
DEVICE SX48, OSCXT2
FREQ 20_000_000
ID "TRISTEST"
'
' IO Pins
'
'DataP VAR RB.0 ' Data pin
'Clock VAR RB.1 ' Clock pin
Latch VAR RB.2 ' Latch.
'Latch VAR RB.5 ' Latch.
Sout VAR RA.3 ' Serial output
Sin VAR RA.2 ' Serial input
SIO VAR TRIS_A ' I/O direction of Port A
BIO VAR TRIS_B ' I/O direction of Port B
CIO VAR TRIS_C ' I/O direction of Port C
DIO VAR TRIS_D ' I/O direction of Port D
EIO VAR TRIS_E ' I/O direction of Port E
PData VAR RC ' Port C (Byte)
'
PROGRAM Start
'
'
' Program Code
'
' Setup IO ports: Direction, etc.
Start:
SIO = %00000111 ' Set RA.3 as out and RA.2 as in for Serial port
' BIO = %11111111 ' Setup port B as inputs
BIO = %00000000 ' Setup port B as ouputs
CIO = %11111111 ' Setup port C as inputs
DIO = %11111111 ' Setup port D as inputs
EIO = %11111111 ' Setup port E as inputs
LOW Latch
'LOW Clock
'LOW DATA
Main:
GOTO Main
I have run into something odd with SX/B which is a bit confusing to me and perhaps
may be a feature I missed in the documentation. I made the small program below
which demonstrates the issue....
In particular try running this in the simulator and watch the TRIS bits for port B.
They are all set as outputs and should stay that way. If I use the LOW command
it changes the lower nybble of the TRIS port to inputs!! When I use RB.2 then that
pin is an output but the other three bits in the lower nybble are converted to inputs.
If I use a low on RB.5 then it changes all four of the lower four TRIS bits for port B
to inputs.... (At least that is what shows up in the simulator!) This is totally
unexpected.
Is this normal behavior for SX/B or is it a bug in either SX/B or the simulator??
This whole thing came about because I had some random issues with port B which
can now be explained if the program is changing some of the pins on the port back
to inputs. I can add pull up resistors to my circuit as a work around in the meantime
but I shouldn't need them if in fact the port always stayed as outputs as I had expected.
If you try running it just swap the comment on the Latch definition to see how the
TRIS settings react when it shows in the simulator.
Please let me know if you have any idea what the problem may be.
Best Regards,
Robert
' =========================================================================
'
' File...... TRISTEST.SXB
' Purpose... Test TRIS direction settings
' Author.... Robert L Doerr
' E-mail.... rdoerr@bizserve.com
' Website... http://www.robotworkshop.com
' Created... 4 APR 2007
' Updated... 4 APR 2007
'
' Version... 1.00
'
' =========================================================================
'
' Program Description
'
'
' This program is written to test the behavior of the TRIS settings
' in SX/B.
'
' Device Settings
'
' Configure SX48 options and setup to use OSCXT2 (external 20mhz oscillator)
' If using an SX28 then specify: , TURBO, STACKX, OPTIONX
DEVICE SX48, OSCXT2
FREQ 20_000_000
ID "TRISTEST"
'
' IO Pins
'
'DataP VAR RB.0 ' Data pin
'Clock VAR RB.1 ' Clock pin
Latch VAR RB.2 ' Latch.
'Latch VAR RB.5 ' Latch.
Sout VAR RA.3 ' Serial output
Sin VAR RA.2 ' Serial input
SIO VAR TRIS_A ' I/O direction of Port A
BIO VAR TRIS_B ' I/O direction of Port B
CIO VAR TRIS_C ' I/O direction of Port C
DIO VAR TRIS_D ' I/O direction of Port D
EIO VAR TRIS_E ' I/O direction of Port E
PData VAR RC ' Port C (Byte)
'
PROGRAM Start
'
'
' Program Code
'
' Setup IO ports: Direction, etc.
Start:
SIO = %00000111 ' Set RA.3 as out and RA.2 as in for Serial port
' BIO = %11111111 ' Setup port B as inputs
BIO = %00000000 ' Setup port B as ouputs
CIO = %11111111 ' Setup port C as inputs
DIO = %11111111 ' Setup port D as inputs
EIO = %11111111 ' Setup port E as inputs
LOW Latch
'LOW Clock
'LOW DATA
Main:
GOTO Main
Comments
You did a good job documenting the problem. I believe you have found a discrepancy between the SX simulator and the SX48 hardware!
The problem occurs with this assembly command:
It is described in the documentation as a read command. However, in the simulator the displayed TRIS value is actually taking on the value of the W register (as would happen under a write instruction). Additionally, the simulator does not appear to adjust the value of W to reflect the contents of the TRIS register during this same operation.
The end result of the entire sequence of assembly instructions for the SX/B LOW commands is currently this. The displayed simulator contents of the TRIS register will always reflect the highest nibble as outputs and the lowest nibble as inputs except for the selected bit, which will actually reflect the correct direction. I do not expect the actual hardware to behave this way.
Can anyone comment on the behavior of real SX48 hardware under the above assembly statement?
- Sparks
Thanks for confirming the behavior of the simulated code. I'm going to do some further tests and see if this also occurs with the other ports or if it shows up when the target code is set to an SX28 instead. Hopefully we'll be able to isolate the issue so it can be fixed in the SX simulator.
Best Regards,
Robert
is used to read and/or write values to/from many different registers in the SX chips. The value held by the m register when the command is executed controls the behavior of the command.
I should have specified that I believe the problem lies with the simulator's handling of the command when the m register holds the value $0F. This should be a "read TRIS_B" command for the SX 48/52. It is a write command for the SX 18/20/28. This is where I think the problem likely resides. I do not think the simulator is treating this combination as a read command for the SX 48/52.
It is my expectation that the SX simulator will handle the SX 18/20/28 code properly.
To this date I have not tested any other register commands.
- Sparks
Just curious to see if the SX simulator has been checked out to see if it is a simple fix to correct the way is works with the SX48 chip. It would be nice to see this resolved so it can more acurately simulate what is going on in the SX48.
Robert
when adding SX48/52 support to SXSim, I must admit that I did it "quick and dirty" by adapting the user interface, and the handling of the larger variable and program memory size. I did not consider the fact that the SX48/52 devices allow to "read" the port configuration registers via a mov !rx, w when the MODE register is set accordingly where the "smaller" SXes only allow to exchange w with the contents of the CMP_B and WKPND_B registers using the MOV !rb, w instruction with MODE set to 8 or 9.
I have added this to the SXSim TODO list, and I hope I'll find some time to fix this incompatibility soon.
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Greetings from Germany,
G