Jitter free PLL's ?
picnet
Posts: 3
Hello,
Im wondering what method can be used to avoid jitter in a PLL output when two pins are driven, and one of the PLL's slightly out of phase of
the other (even tho they are both set to the same frequency)
Examples:-
http://ohidunno.com/srv6/jitter-longterm.jpg
http://ohidunno.com/srv6/jitter-persist.jpg
My intended application is generating the local oscillator for a software defined radio, actually two clocks
one out of phase of the other, to directly switch a bus switch which is acting as a direct sampling
converter. (search for softrock40 / sdr to see examples of this)
Currently the softrock uses an xtal and divides down using 74 logic to produce the phase clocks,
to the bus switch, my intention here is to replace that with a propeller to made a synthesized version,
although Im having doubts if this is at all possible?
For a given frequency range e.g 7 to 8Mhz is there any way to reduce jitter totally?
My experimentation so far has been based on the frequency generation code, with two PIN's
active.
http://ohidunno.com/srv6/pll-srv6-clks.jpg
Shows the original boards clock's in light grey with the propeller output in black.
Any guidance is appreciated.
Thank you.
-Mike.
Im wondering what method can be used to avoid jitter in a PLL output when two pins are driven, and one of the PLL's slightly out of phase of
the other (even tho they are both set to the same frequency)
Examples:-
http://ohidunno.com/srv6/jitter-longterm.jpg
http://ohidunno.com/srv6/jitter-persist.jpg
My intended application is generating the local oscillator for a software defined radio, actually two clocks
one out of phase of the other, to directly switch a bus switch which is acting as a direct sampling
converter. (search for softrock40 / sdr to see examples of this)
Currently the softrock uses an xtal and divides down using 74 logic to produce the phase clocks,
to the bus switch, my intention here is to replace that with a propeller to made a synthesized version,
although Im having doubts if this is at all possible?
For a given frequency range e.g 7 to 8Mhz is there any way to reduce jitter totally?
My experimentation so far has been based on the frequency generation code, with two PIN's
active.
http://ohidunno.com/srv6/pll-srv6-clks.jpg
Shows the original boards clock's in light grey with the propeller output in black.
Any guidance is appreciated.
Thank you.
-Mike.
Comments
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Paul Baker
Propeller Applications Engineer
Parallax, Inc.
Am I right to infer that you're trying to generate two signals in quadrature with each other for synchronous demodulation? If so, your best bet will be to start with a 2X signal and use gating and dividers the way the SoftRock40 does it. But even then, you won't get a steady enough output from the Propeller's PLL to accommodate your needs. At certain frequencies there will always be some phase jitter.
There was an extensive thread on this topic many months ago, but I'm unable to locate it. (It may be on the private beta testers forum, which would explain why a Google search doesn't turn it up.)
-Phil
http://forums.parallax.com/showthread.php?p=583301
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Ian Mitchell
www.research.utas.edu.au
That's the one. Good find!
-Phil
Thank you Ian for the pointer to the other thread, and Phil your spot on with, "
Am I right to infer that you're trying to generate two signals in quadrature with each other for synchronous demodulation? If so, your best bet will be to start with a 2X signal and use gating and dividers the way the SoftRock40 does it. But even then, you won't get a steady enough output from the Propeller's PLL to accommodate your needs. At certain frequencies there will always be some phase jitter."
- very true and rather disappointing also. After reading the frequency generator code by chip, ones mind tends to mull over and eliminate clutter from designs when considering the propellers capabilities, I guess its true of any new device but the prop has some rather niche novelty about it [noparse]:)[/noparse]
Ive tried directly using 2 pins of the propeller, (see the previous waveform shots) and also single pin output to the exisiting softrock board, this works but for some frequencies theres harmonics. -the intention was to replace the 74 logic entirely and just let the propeller act as the frequency syth to the bus switch (e.g 2 I/O's or PLL's running) - although after spending some time watching the waveforms both in time and frequency domain [noparse][[/noparse]as a side issue, I did find out my scope would do FFT all the way to 400Mhz when running an RMS averaged FFT which isnt bad considering its spec'ed at 100Mhz..] ... Its pretty clear at least by directly using the counters it may not be possible. I saw another post where it was suggested to use many cogs for DDS 'like' generation, but to understand how to do this in software I'll have to take a closer look / spend more time fiddling.
Paul the phase is one issue (which seems to be ok at present) but without clean square wave generation from the PLL's , e.g this image shows pin 1 in relation to pin 0 over time, http://ohidunno.com/srv6/jitter-persist.jpg which is no where near jitter free. - not a bad thing just need to find a work around or an alternative solution.
After reading the other post pointed out by Ian I'll reconsider using the prop for this task (=ever poorer than poor mans spectrum analyzer)
On that subject,
Makes me wonder why nobody's press ganged those DVB-T receiver "usb" sticks into a 2nd life as an analyser considering the frequency range they cover and decoding thats going on inside them...
Kind Regards,
-Mike.