ADC 0809 interfacing with BS2

sundar

Hi

··· i need to interface the ADC 0809 with BS2 and list the sample data on the debug screen.im in doubt with the connection between the digital outputs(D0-D7) with the BS2 whether i can directly connect a wire between· the digital out pins and the BS2 pin or use a pulldown resistor for each of the pin.In the datasheet it is specified that the outputs are TTL Tristate compatible so im little confused.

The datasheet can be seen here >> http://www.ortodoxism.ro/datasheets/nationalsemiconductor/DS005672.PDF

Thank you for your help in advance.

Unsoundcode

Hi sundar, the three states of TRI State are Logic"1" Logic "0" and High impedance. If the output enable is held at logic "1" then you will always have a valid logic level at the outputs and there should be no need for pull up/down resistors. If the output enable is taken to logic "0" that would take the outputs to high impedance and the input pins to the Stamp would be "floating" . This is so more than one device can share the same bus. If you only want to connect a Stamp and an ADC 0809 keep the output enable at logic "1" and you should not need resistors.

Jeff T.

sundar

Thank you for the help.I just wanna connect only the stamp and the ADC .If the output enable is always kept at logic level '1' then the digital outputs appear at the stamp terminals always .would there be any problem reading the digital data?

Unsoundcode

Hi sundar, I took a quick look at the data sheet and the timing diagram, there is an example of how to connect the ADC, the output enable clocks the data to the output so you can't hold it high, and it uses the EOC to signal the processor to read the data. If your timing is right you still shouldnt need the resistors .

Jeff T.

sundar

Ok.What i have understood from the data sheet is :

1.First enable the Address Latch Enable(ALE) with a short pulse of duration approximately for 1 clock period.
2.A 3 bit address corresponding to the specific analog input pin we want to use is given to the A,B,C terminals .
3.After a very short time give the start pulse.
4.After convertion the EOC pin indicates it with a high state.it is given to the stamp so that it can give the next start pulse for the forthcoming data.
5.All the 8 digital out pins are connected to the stamp without any resistors and the BS2 displays the digital data on the debug window.
6.output enable is pin is made high to get the output dig. data.

Note:Im planning to use a 555 timer in astable mode for the clock input.
Im going to test with an audio output as the analog signal.The sampling rate would come around 2 x ( max frequency of audio signal i.e 20 KHz) = 40 KHz which is the clock input.

Unsoundcode

The EOC line is a high state before the conversion, so from the Stamps point of view it has to see the EOC go low then high,· set the output enable line high, read the data then set the output enable·low.

Jeff T.