multiple prop D/A A/D question.

rjo_

I am in the process of becoming the proud father of twin piggybacked props. So, I'm trying to line up a sequence of little projects I want to do... somewhere near the top of the list comes this:

There will always be a good safe maximum sampling rate for D/A applications and there will always be applications where that particular sampling rate just isn't enough.
The only thing that will ever change is exactly what that safe maximum sampling rate is.

What would stop us from using a 10Mhz clock external to two Props... and then simply switch the clock line between the two props every clock cycle? In effect, each prop would be getting a 5Mhz clock... put there would be a 1/2 clock cycle delay between them.

Then set up a perfectly identical D/A arrangement... right down to which cog and which pin is doing the work on each prop, split the signal line to each prop and do interleaved acquisition... When that was done... reorder the data. For that matter what would stop us from using a 100Mhz clock with 10 props to achieve a 10 fold increase in the maximum sampling rate?

Obviously, every time you double the number of props... you also double the amount of hub ram available. So, as you increase your sampling rate you are also increasing the total amount of hub ram... system wide.

On the signal synthesis side you would essentially reverse the process...not exactly but the first step would be to serially partition the data across the prop network

In theory, I don't see why it shouldn't work... but practical reality sometimes intervenes, and there may be a fact I'm not aware of that shoots the "theory" part to bits.

I'm not saying that this would work without some careful electronic design. I'm simply asking if anyone knows a serious issue that would tend to make it the equivalent of rocket science to get it to work.

Thanks.

Rich

Mike Green

I don't know for certain, but I suspect the "switch the clock line" won't work. You could use an external clock with a normal and inverted clock output or run the 10MHz clock into a flip-flop and use the normal and inverted outputs of that to get two 5MHz clocks out of phase with each other. Given that basic clock is normally multiplied to put it in the 80MHz range would eliminate any advantage over just using the same 5MHz clock for all. Chip and others have shown how to synchronize multiple cogs within a Propeller using the system clock and WAITCNT instructions.

Graham Stabler

The aquisition time is likely to be multiple clocks so the interleaving would be between multiple clock cycles so you could leave the clocks as they are.

If on the other hand you wanted to do something like have two camera arrays looking at the same thing you can double the overall frame rate by putting the shutters out phase, that might need two props out of phase too.

Graham

rjo_

Graham,

I'm just starting to noodle this... and I'm thinking that if we want to build a multiple prop set up... we are going to need a flexible clocking system...external to the prop architechture.

At this point, I was just looking at taking a single external signal and doing "gang" A/D on it to increase the sampling frequency. Just figuring out how to explain it so that Mike can understand my question is the first hurdle...But, Mike is pretty smart... and he "devined" the question properly. I am definitely not an engineer[noparse]:)[/noparse] But I figure, if I solve problems... one at a time... with a lot help, eventually...


Thanks,

Rich

rjo_

I don't suppose there is a "Clocks are Us" anywhere.

Graham Stabler

So if there is a capture time (while the ADC does its thing) and a download time while the prop gets the info then you can interleave these by either having two ADCs or one ADC that is too fast for a single prop. Then let one prop be the master and trigger the other prop, "I've finished, now go". Or just syncronize actions with a single clock as Mike suggested. You just need to trigger one prop with the other and then they just set off doing there slight different things, if they use waitcnt to provide the effective clock for capture (period is multiple system clocks) it is just a matter of loading them with different values on the first run through.

Probably.

Graham