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Javelin EEPROM usage and CLK availability — Parallax Forums

Javelin EEPROM usage and CLK availability

Mark FosslerMark Fossler Posts: 4
edited 2007-01-31 23:41 in General Discussion
I'm working on a new design, and can't find specific info on whether I can write/read EEPROM under program control. I can add a serial EEPROM to the architechture to store a few power-up variables, but why re-invent the wheel ? I'd also like to get a clock, any clock, from the Javelin module that I can buffer and use for a·FPGA state machine.·Syncronous is always better.·I don't see one in the docs, but is there one lurking out there that isn't published ?

Best Regards,

Mark

Comments

  • Peter VerkaikPeter Verkaik Posts: 3,956
    edited 2007-01-31 00:29
    You can use EEPROM from the core package. See JIDE help.
    If you store values from address 0 upwards, downloading a new
    program to the javelin does not overwrite stored values.

    You can generate a stable clock signal using the PWM vp.
    Since PWM runs in the background it is not affected
    by your program code.

    regards peter
  • Mark FosslerMark Fossler Posts: 4
    edited 2007-01-31 01:28
    I can read/write the E2 under Java application control ? I want the code to "learn" a little to tweak out some control parameters.

    As for the clock, the PWM would work, but under ideal conditions/maximum performance·I would need/want a 640 khz clock which would eat a fair amount of program cycles....I guess I can just add a clock gen and sync with a few metastable resistant FFs and pay close attention to my timing diagrams. Syncronous on one side, async on the other...piece of cake. I'll probably be back with some exception processing questions in the near future.

    I think it's a great "chip". I've resisted the Stamps for a number of years, prefering micros I could write asm for....I like my "bits"...ADDC & SHFTL, but I saw this Java box and Marky's ears perked up....$90 bucks, 25 Mhz, with tools. I saw a post, "I wish it was faster and cheaper" and I had to chuckle....I think a lot of guys wish the same thing about their wives ! (forgive me Lord, Hail Mary, Our Father) I'm still a bit-banger at heart, but after you get all of the closing braces in the right spots, Java·is a whole lot easier to change. I know Java about as well as I know the bottom of my shoe, but when you make an error in software, all you have to do is re-compile.

    Best Regards,

    Mark
  • Jon KeinathJon Keinath Posts: 146
    edited 2007-01-31 03:11
    Yes, you can read/write under program control.

    It is outlined in the Javelin Stamp manual on page 202 of the PDF HERE or page 182 of the hardcopy manual.

    Here is the example code from the manual:

    import stamp.core.*;
    public class EETest {
    static void setEEProm(int n) {
    // have to chop n into bytes
    EEPROM.write(0,(byte)(n&0xFE));
    EEPROM.write(1,(byte)(n>>8));
    }
    static int getEEProm() {
    int x;
    x=EEPROM.read(1);
    x=(x<<8)+EEPROM.read(0);
    return x;
    }
    public static void main() {
    setEEProm(2300);
    System.out.println("Bytes available in EEPROM:");
    System.out.println(EEPROM.size());
    System.out.println("The value you wrote to EEPROM:");
    System.out.println(getEEProm());
    } // end main
    } // end class
    
    

    ▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
    -Jon
    www.jonkeinath.com
  • Peter VerkaikPeter Verkaik Posts: 3,956
    edited 2007-01-31 05:54
    With PWM you must set the low and high period time in 1-255 units of 8.68usec.
    The highest frequency is therefore 1000000/(8.68+8.68)=57.6kHz.

    regards peter
    ·
  • Mark FosslerMark Fossler Posts: 4
    edited 2007-01-31 22:52
    Do you have a feel for what percentage of processor time would be used for a 56 KHz clock output using the PWM ? A best guess ?

    Best Regards,

    Mark
  • Peter VerkaikPeter Verkaik Posts: 3,956
    edited 2007-01-31 23:12
    I checked an asm listing for an 8bit pwm VP and that listed 18 cycles.
    Since the interrupt service routine runs every 217 cycles (25MHz*8.68usec)
    the pwm isr code·takes about (18/217)*100% = 8.3%.
    The 18 cycles is in fact the storage size for the isr pwm code and the real
    executed statements take less then 18 cycles because not all statements
    are executed every isr. The percentage is therefore less than 8.3%.

    regards peter
    ·
  • Mark FosslerMark Fossler Posts: 4
    edited 2007-01-31 23:41
    After I get the FPGA code written I'll run some simulations and see if I can live with the -10X clock. The overhead hit of the PWM is miniscule.

    Thanks to all.
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