Does the propellor have internal memory of 64Kb (32Kb ram and 32Kb rom) in addition to having the external eeprom memory which you can have connected to it?
ok I think I figured it out, the propellor does have 64Kb memory internally which is divided into the ram and rom. So then you have 32Kb for ram. Now once your program is uploaded into this 32Kb of ram the next thing that happens is the interpreter is loaded into cog 0 and starts executing code from main ram correct? Then from here you can load different code into each cog. So once you load code into a cog and start it executing the code, Can you reload the cog with different code without effecting the rest of the chip?
When the Propeller is reset, there is a routine in ROM (the bootloader) that gets loaded into a cog automatically and started. This routine looks at pins 30/31 for the presence of a serial port. If there, it waits for the Propeller Tool or equivalent program to download a program to RAM. When that's done, the Propeller Tool instructs it to stop or to copy the entire contents of RAM to an EEPROM attached to pins 28/29, then either stop or start the SPIN interpreter from ROM which interprets the contents of RAM. If there's no serial port attached, the bootloader attempts to copy a program from an EEPROM on pins 28/29. If that's successful, the SPIN interpreter is started, otherwise the bootloader stops.
Once a program is running under control of the SPIN interpreter, it can do anything it wants including starting up one or more other cogs with programs from RAM. Any cog can reload itself or any other cog with a new program without affecting the rest of the chip. Pretty much the only global resource (other than RAM) that can affect all the cogs is the system clock control register.
In reality, the propeller has about 64K of RAM and 32K of ROM. 32K of the RAM is in the "main" address space,
along with the 32K of ROM. Each COG than has 512 4-byte registers, which is essentially another 2K of RAM
each, and this sums over the 8 COGs to another 32K of RAM.
When you are running a COG program, the SPIN interpreter is copied from a particular 2K chunk of the ROM
into one of the COGs and run from the COG.
It is not impossible to use the COG memory for interesting things. For instance, I'm considering using about
1K of a COG RAM as buffering for the FAT16 routines, so that buffering won't be required in main memory.
The problem with doing this is all access to that RAM needs to be through the COG, since COGs cannot
access the memory of another COG.
Comments
Once a program is running under control of the SPIN interpreter, it can do anything it wants including starting up one or more other cogs with programs from RAM. Any cog can reload itself or any other cog with a new program without affecting the rest of the chip. Pretty much the only global resource (other than RAM) that can affect all the cogs is the system clock control register.
along with the 32K of ROM. Each COG than has 512 4-byte registers, which is essentially another 2K of RAM
each, and this sums over the 8 COGs to another 32K of RAM.
When you are running a COG program, the SPIN interpreter is copied from a particular 2K chunk of the ROM
into one of the COGs and run from the COG.
It is not impossible to use the COG memory for interesting things. For instance, I'm considering using about
1K of a COG RAM as buffering for the FAT16 routines, so that buffering won't be required in main memory.
The problem with doing this is all access to that RAM needs to be through the COG, since COGs cannot
access the memory of another COG.