minimum cycletime for XY2-100 protocol
StefanL38
Posts: 2,292
Hello Assembler-freaks
i would like to know what could be the minimum cycletime for XY2-100 protocol on the propeller-chip
this protocol works like this
every cycletime transmitting 20 bits
3 control-bits
16 databits
1 paritybit
here is a raw description of the signal levels for the sync-pin and the data-pin
load control-value
OR it with datavalue
calculate parity bit
change sync-pin from high to low
wait half baudtime
send out first bit
change sync-pin from low to high
send out second to 19th bit
change sync-pin from high to low
send out 20 bit
change sync-pin from low to high
the control value and the datavalue is changed by another cog
would you suggest to use semaphores or mutex something like that?
is 10 microseconds realistic?
thank you very much for a "two-thumbs"-calculation
best regards
Stefan
i would like to know what could be the minimum cycletime for XY2-100 protocol on the propeller-chip
this protocol works like this
every cycletime transmitting 20 bits
3 control-bits
16 databits
1 paritybit
here is a raw description of the signal levels for the sync-pin and the data-pin
load control-value
OR it with datavalue
calculate parity bit
change sync-pin from high to low
wait half baudtime
send out first bit
change sync-pin from low to high
send out second to 19th bit
change sync-pin from high to low
send out 20 bit
change sync-pin from low to high
the control value and the datavalue is changed by another cog
would you suggest to use semaphores or mutex something like that?
is 10 microseconds realistic?
thank you very much for a "two-thumbs"-calculation
best regards
Stefan
Comments
You dont need to resort to semaphores or mutex, you can pack both the control and data into 1 32bit location, you can use the extra bits as an ordering system. A 1 bit ordering system, the transmitter would fetch the data packet check a bit within the packet, if that bit is the inverse of the previous packet the transmitter knows its a new packet and transmits it. If it's the same it fetches until that bit is different. Since you have only one producer (packet generator) and one consumer (transmitter), as long as the producer makes allowances for the consumer to fetch the data (ie don't generate packets too quickly) you won't run into any problems.
If you want to play it safe you can do a double-take pass off system where the transmitter after receiving a packet writes some impossible data to the location. Expanding on the previous example: only the producer sets an unused bit to 1 and the consumer only clears that bit to 0. The producer reads the value first, checks that the bit is cleared, then writes the next packet, with the indicator bit set. If the bit was set, that means the transmitter hasn't picked up the data and to keep reading the location until the bit is clear. The consumer reads the value and checks the bit, if it is set it writes back a value (such as 0) where the indicator bit is cleared and transmits the data. If the bit was clear, it continues to read until the bit is set and it knows it has valid data to transmit.
This second operation is similar to semaphore passing, only you are rolling it up with the data to reduce the number of memory accesses required.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Paul Baker
Propeller Applications Engineer
Parallax, Inc.
Tried to find detaled description of XY2-100 protocol, but found nothing.
Could you please give some kind of such a document or web-link to it?
Thanks a lot!
Alexandr.
i made another try with google about the XY2-100 protocol
all what i found is that almost all manufacturer of LaserScanheads use this protocol
It was developed by http://www.gsig.com/
So maybe one way could be to aks one of these companies by mail
To me it is not interesting longer at the moment.
So i think the only way to find out how it works is to use 1 100MHz Memory Oscilloscope recording and analysing the signals
But it is really strange that there cannot be found easily specs about an "industrial standard"-protocol
greetings
Stefan
2MHz clock, synk and data, each uses rs422 voltage levels.
total 20 bits are transmitted in 10usec. 3 control signals, 16 data and 1 parity
their are 2 synk signals indicatin start and end of data. Synk signal goes from low to hign with rising edge of clock signal