Fun with counters
rokicki
Posts: 1,000
I'm having fun with counters! Did you know the phs registers make great
32-bit output shift registers, allowing you to control an output pin with
arbitrary data once per clock cycle? Just set frq to 0, use the normal
NCO/PWM mode, and ROL the phs register itself.
I've got secure digital read code now that uses only two instructions per bit read,
by using a counter to generate the clock (plus some loop overhead). At 20 MIPs,
that's a 10MHz clock, potentially more than 1MB/sec. I'm pretty sure I can do
writes at one instruction per bit. My current 512-byte block read speed is
66,640 cycles (measured from SPIN) and this can *easily* be reduced.
You have to be very careful how you do it this way, though; if you try to
mix counter control and non-counter control of the same output line,
for instance, it's easy to get glitches (much shorter than a clock cycle)
on the output lines.
What would be really cool is if the video output circuitry could be used
with a counter that is *not* in PLL mode, so we can get tighter control
over the specific cycles that certain values are output in. (VSCL seems
to imply that only PLLA will suffice.)
Anyway, tons of fun. The counters can do all sorts of cool things. I hope
to have a super-fast SD reader and writer code up pretty soon.
Now if only I had a better oscilliscope. Mine only goes up to 30MHz, so a
40MHz pin looks like a sine wave on my scope.
32-bit output shift registers, allowing you to control an output pin with
arbitrary data once per clock cycle? Just set frq to 0, use the normal
NCO/PWM mode, and ROL the phs register itself.
I've got secure digital read code now that uses only two instructions per bit read,
by using a counter to generate the clock (plus some loop overhead). At 20 MIPs,
that's a 10MHz clock, potentially more than 1MB/sec. I'm pretty sure I can do
writes at one instruction per bit. My current 512-byte block read speed is
66,640 cycles (measured from SPIN) and this can *easily* be reduced.
You have to be very careful how you do it this way, though; if you try to
mix counter control and non-counter control of the same output line,
for instance, it's easy to get glitches (much shorter than a clock cycle)
on the output lines.
What would be really cool is if the video output circuitry could be used
with a counter that is *not* in PLL mode, so we can get tighter control
over the specific cycles that certain values are output in. (VSCL seems
to imply that only PLLA will suffice.)
Anyway, tons of fun. The counters can do all sorts of cool things. I hope
to have a super-fast SD reader and writer code up pretty soon.
Now if only I had a better oscilliscope. Mine only goes up to 30MHz, so a
40MHz pin looks like a sine wave on my scope.
Comments
That sounds a nice work from you !!
I'm beggining with PChip, and found a bit hard to understand CTRA, CTRB, FRQA,....etc. registers.
Could you share a simple use of it (explained..) ?, a different one that exist in forum.
Good Job !!...and good luck.
Regards
Alberto.
cool stuff!
marty
P.S. this style of clocking plus a 4-bit bi-directional buss (like I2C but 4-bit wide) should enable an external SRAM interface to page data in or out of main memory at 4MB/s while using eight pins or less.
works fine. I am adding writing now, and hope to release the code soon.
Yep, with a serially-pumped memory chip, you should be able to do pretty well! The trick will be shifting in the
data fast enough. If you use one bit, it works because you can use the carry bit. But four bits, if you use one to
read them from outa to another register, you have to combine them with the previous values then in only one
instruction.
But there's all sorts of cool tricks you can do. My SD card read uses a loop unrolled 32 times so I read 32 bits
in one iteration.
These are really neat ideas for using counters. I'm very interested to learn about such things, as it's often new to me, too. Thanks.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Chip Gracey
Parallax, Inc.