Minimum voltage that registers HIGH in BS2?
Friends:
On the Basic Stamp 2, what is the minimum voltage that can be read at a pin to still register a HIGH condition?
"Sourcing" current means the BS2 can provide the current and "sinking" means it can receive the current right?
Thanks amigos,
Migs
On the Basic Stamp 2, what is the minimum voltage that can be read at a pin to still register a HIGH condition?
"Sourcing" current means the BS2 can provide the current and "sinking" means it can receive the current right?
Thanks amigos,
Migs
Comments
However, I've never tried the experiment to see measure precisely the very minimum! I don't know whether anyone else has, or Parallax has an official answer. It would possibly vary from Stamp to Stamp.
John
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Manxstamp,
Isle of Man, British Isles
Thanks a bunch for the info and the speed of the reply. I just got into this doing the "What's a Microcontroller" book. Your answer is plenty useful because in one of the examples using a LED they add a 220 ohm resistor in the circuit and it was unclear how they chose this value. Later they explain that in most cases this resistor is replaced by a wire, which is what I would have expected in the circuit to begin with. Thus the question.
Again, many thanks!
Migs
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You are right about sourcing and sinking current.
Resistors with LEDs are chosen to limt the current flowing through the LED. Without a current limiting resistor, the LED would burn out. The value of the resistor depends on the voltage drop across the LED and the maximum current that the LED can handle; the formula is explained on several websites, such as
http://www.kpsec.freeuk.com/components/led.htm
You'll see that from the WAM text that·with the 5 volts used by the Stamp and the standard LEDs supplied, 470 ohm resistors are usually used.
John
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Manxstamp,
Isle of Man, British Isles
Regards,
Glen
The 1.5 VDC reading for the assurance of a logic 1 is right in line with the strata criteria of 1.4 VDC being the "no man's land" dividing a logic 0 from a logic 1. It's my understanding, and someone please correct me if I'm wrong, that it is the characteristics of the chip strata, in this case CMOS, and nothing else which dictates the cross-over point (threshold voltage level) for a logic 0 vs. a logic 1. The individual Stamp, or Stamp model should make no difference at all.
Here is an interesting table with the logic threshold voltage levels for various families of solid state devices:
http://www.interfacebus.com/voltage_threshold.html
Regards,
Bruce Bates
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http://www.parallax.com/dl/docs/prod/stamps/BASICStamp2px.pdf
This implies that TTL designs trigger at ~1.4VDC, while CMOS triggers at 50% of the supply voltage. But, the pins of the BS2px can be programmed to trigger either as TTL's or as CMOS. A neat trick that I don't understand.
Regards-
Glen