Clarifications for Comparison of STAMP and SX memory
John Kauffman
Posts: 653
I would like to clarify my understanding of the memory issues for STAMP BS2 and SX28. These are questions that are more broad then the architecture of the SX RAM (which is well-described by Guenther).
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Some of the confusion comes because I do not have a degree in Comp Sci. I can write the code to make it work, but I don’t understand what is happening. I have studied this in the literature and Wikipedia, but have not found a place where it is all brought together and directly applied to a comparison of the Parallax products. Thanks.
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?? The question marks indicate a request for info. ??
·
First, there are three physical kinds of memory we can discuss:
··········· EEPROM – external (read & write at run time)
··········· EE/Flash – built in (read only at run time)
··········· RAM – built in (read & write at runtime)
·
Here are the speeds
··········· EEPROM
slow
also requires time to request and transfer data from EEPROM to CPU
··········· EE/Flash
······················· Fast– same as CPU?
······················· No need for off-chip requests and transfers
··········· RAM
······················· Same speed as CPU ?
······················· Transfer fastest because closely integrated with CPU?
·
Here is how the microcontroller families use them:
STAMP
··········· Load mode
puts program (as tokens)into EEPROM ·
puts data for tables into EEPROM
··········· Run mode:
pulls program tokens from EEPROM and interprets
reads tables from EEPROM
holds variables in RAM
can write data to EEPROM
SX
··········· Load mode
puts compiled program package into EE/Flash
puts into EE/Flash data tables
··········· Run mode:
Executes program from EE/Flash
Reads tables from EE/FLASH
Holds variables in RAM
·
Here are the sizes from Spec sheets
STAMP
··········· EEPROM = 2k bytes (about 500 instructions) (other stamps are 8x 2k)
··········· ··········· Must hold program tokens
Extra space available for data tables (are these tokenized ?? )
Extra space available for storing data at runtime
··········· RAM = 32 bytes, 26 available for variables
··········· EE/FLASH = ?? (not of concern to us, since not directly available ?)
SX······
··········· EEPROM = 0
··········· EE/Flash = 2048(bytes?) x 12
······················· Must hold compiled program
Extra space available for data tables
Are data tables part of the compiled package or somehow separate?
··········· RAM = 136 bytes
·
Additional questions:
·
?? In one post someone mentioned that the STAMP has much more space for code. But it seems the STAMP has max 2k in the EEPROM and the SX has 12 x 2k in its EEFLASH. Furthermore, the compiled package for SX should be smaller then the tokens for STAMP, so more commands in SX, no? (Bean will say I’m comparing apples to oranges, but I guess a need a better mental model of each fruit).
·
?? When the SX program uses a constant, that is written to EEFlash at load and thus frees space in RAM for more variables?
·
?? Does the STAMP use EEFlash in its PIC but that is only accessed by the interpreter and thus not of concern to us as programmers?
·
?? (Not crucial question) I’m curious about the SX internal structure of EEFlash and RAM.
- Are they different physical areas on one chip·-or- are there multiple chips within the SX package (one being an EEFlash chip) ?
- Why is the RAM so limited – does it take a lot more transistors to create or is their a limit due to size of address? Perhaps it takes a lot of current to keep RAM active? Perhaps good programmers don' t need a lot of variables.
Thanks.
·
Some of the confusion comes because I do not have a degree in Comp Sci. I can write the code to make it work, but I don’t understand what is happening. I have studied this in the literature and Wikipedia, but have not found a place where it is all brought together and directly applied to a comparison of the Parallax products. Thanks.
·
?? The question marks indicate a request for info. ??
·
First, there are three physical kinds of memory we can discuss:
··········· EEPROM – external (read & write at run time)
··········· EE/Flash – built in (read only at run time)
··········· RAM – built in (read & write at runtime)
·
Here are the speeds
··········· EEPROM
slow
also requires time to request and transfer data from EEPROM to CPU
··········· EE/Flash
······················· Fast– same as CPU?
······················· No need for off-chip requests and transfers
··········· RAM
······················· Same speed as CPU ?
······················· Transfer fastest because closely integrated with CPU?
·
Here is how the microcontroller families use them:
STAMP
··········· Load mode
puts program (as tokens)into EEPROM ·
puts data for tables into EEPROM
··········· Run mode:
pulls program tokens from EEPROM and interprets
reads tables from EEPROM
holds variables in RAM
can write data to EEPROM
SX
··········· Load mode
puts compiled program package into EE/Flash
puts into EE/Flash data tables
··········· Run mode:
Executes program from EE/Flash
Reads tables from EE/FLASH
Holds variables in RAM
·
Here are the sizes from Spec sheets
STAMP
··········· EEPROM = 2k bytes (about 500 instructions) (other stamps are 8x 2k)
··········· ··········· Must hold program tokens
Extra space available for data tables (are these tokenized ?? )
Extra space available for storing data at runtime
··········· RAM = 32 bytes, 26 available for variables
··········· EE/FLASH = ?? (not of concern to us, since not directly available ?)
SX······
··········· EEPROM = 0
··········· EE/Flash = 2048(bytes?) x 12
······················· Must hold compiled program
Extra space available for data tables
Are data tables part of the compiled package or somehow separate?
··········· RAM = 136 bytes
·
Additional questions:
·
?? In one post someone mentioned that the STAMP has much more space for code. But it seems the STAMP has max 2k in the EEPROM and the SX has 12 x 2k in its EEFLASH. Furthermore, the compiled package for SX should be smaller then the tokens for STAMP, so more commands in SX, no? (Bean will say I’m comparing apples to oranges, but I guess a need a better mental model of each fruit).
·
?? When the SX program uses a constant, that is written to EEFlash at load and thus frees space in RAM for more variables?
·
?? Does the STAMP use EEFlash in its PIC but that is only accessed by the interpreter and thus not of concern to us as programmers?
·
?? (Not crucial question) I’m curious about the SX internal structure of EEFlash and RAM.
- Are they different physical areas on one chip·-or- are there multiple chips within the SX package (one being an EEFlash chip) ?
- Why is the RAM so limited – does it take a lot more transistors to create or is their a limit due to size of address? Perhaps it takes a lot of current to keep RAM active? Perhaps good programmers don' t need a lot of variables.
Thanks.
Comments
Bean.
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As a result, the physical comparision of memory is quite simple. The SXes are the microprocessors for the BasicStamp. As I recall the BS2sx is the only one that uses the SX28 which has 128 bytes of RAM and 2K eeprom on board. The new ones use an SX48 with 256 bytes of RAM and 4K of eeprom on board.
Additionally, the BS has an attached EEPROM that provides for tokenizing the PBasic.
Those are the physical comparisions.
Why is the RAM so limited? Mainly because you don't need much more than 256 bytes of variables when you are handling one or two bytes at a time. As your program moves through its logic, it can reallocate RAM for other uses to avoid running out of space.· Often this is seen as 'temporary' or 'scratch pad' registers.·
The real power is the resulting speed at which you can move the processed bytes. Your PC uses a completely different architecture and large RAM spaces allow you to load the whole program from a hard disk file into RAM for quick operation. These microcontrollers don't store programs in a vast file system, so they really don't need to transfer their complete operation into RAM for more efficient us. They are simply dedicated to their particular program.
Awkwardly the new AVRs have jumped RAM and Flash into 32K, 64K and beyond. But, the fundumental question is, "Does anyone really fill all that RAM in actual applications or does it remain empty capacity?"·· I suspect a lot of it remains unused, but sales are good amongst novices because people don't know what they really need to have.· The bigger is better concept from PC sales just carries over into a somewhat extravagant technology.
In other words, RAM size·alone is not computing power. In fact we have all seen that doubling RAM without a similar increase in speed will actually slow down some computing.· Try to become an expert and recognize that there are different 'flavors' of computing.· Learn microcontrollers as one flavor and a good learning environment.
In a given context - A completely balanced, well understood architecture is required to gain real power. I suggest you learn to program the SXes at the assembly level if you want to understand this. And if you want to have more power, take a look at the Propeller.
More is less, and less is more - Mies Vander Roh
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Post Edited (Kramer) : 10/18/2006 9:14:12 AM GMT