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challenges of VGA vs NTSC color — Parallax Forums

challenges of VGA vs NTSC color

cbmeekscbmeeks Posts: 634
edited 2006-09-25 11:26 in General Discussion
Some things I have discovered in my VGA circuit design (vs my NTSC color circuit) are a lot more challenging than I thought.

For example, in NTSC, you basically get 160 pixels and running 78.74999 Mhz, you can get 22 clocks per pixel.

In VGA, 640 pixels is pretty much hopeless even at 80 Mhz. 256H pixels (my target res) can give you about 8 clocks per pixel at 80Mhz. In reality, that 8 clocks is reduced to 4 because a JMP takes 4. (then again, I haven't researched quicker loop methods yet). So that means 4 clocks per pixel. An IREAD takes 4! Now using 15ns SRAM (and each SX clock taking 12.5ns) you pretty much need 2 clocks to increment an address bus. Bottom line, MUCH less bandwidth per pixel in VGA.


A 160x192 pixel NTSC image (16 color) takes 15360 bytes. A 256x192 pixel VGA takes 49152 bytes. Granted, that's using 64 colors...8 colors would take 24576 bytes. So more memory for an image.


NTSC has that "coolness" factor....VGA does not (well, not to many).

Anyway, I guess what I am getting at is that to me, these challenges are what is making my VGA circuit fun. I mean, why even bother with VGA unless you are going to meet what I consider minimum specs for a mcu. (256x192 with 64 colors).

Of course all of these is based on not using any external video parts (RAMDACs, etc).

Your thoughts? smile.gif

cbmeeks

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Post Edited (cbmeeks) : 9/20/2006 8:40:20 PM GMT

Comments

  • BeanBean Posts: 8,129
    edited 2006-09-20 22:58
    cbmeeks,
    You need to connect the SRAM data bits to the VGA DAC resistors directly. That way all the SX has to do it increament the address. It doesn't have to handle the data at all.
    At least that's how I would do it. I assume it doesn't matter if the RGB pins have a level on them when the VSYNC and HSYNC are active.

    Bean.

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  • cbmeekscbmeeks Posts: 634
    edited 2006-09-20 23:14
    Bean (Hitt Consulting) said...
    cbmeeks,
    You need to connect the SRAM data bits to the VGA DAC resistors directly. That way all the SX has to do it increament the address. It doesn't have to handle the data at all.
    At least that's how I would do it. I assume it doesn't matter if the RGB pins have a level on them when the VSYNC and HSYNC are active.

    Bean.

    You are correct. That will work great displaying data from SRAM. The hard part comes when you want to write to that data before you draw it. Well, small amounts of data would be fine...full screen animation would be difficult. :-D

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  • GKCSGKCS Posts: 10
    edited 2006-09-21 07:06
    Maybe this is from interest ....

    http://www.serasidis.gr/circuits/AVR_VGA/avr_vga.htm

    They used an Atmel AVR (Mega8 and up), coding was done with GCC. Interesting is indeed the easy board layout, either for PAL or VGA output ....

    Honestly, what can an AVR do, what a SX can't?

    Gerry
  • BeanBean Posts: 8,129
    edited 2006-09-21 12:02
    Gerry,
    That is interesting. Although it is only black and white on both VGA and NTSC. Well, there's only so much you can do running at 16 MIPS. Cbmeeks is running 5 TIMES faster than that.

    Bean.

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  • cbmeekscbmeeks Posts: 634
    edited 2006-09-21 12:09
    Yeah, that was interesting! And yes, I am screaming at 80 MIPS...

    One thing I am proud of is that I have reduced my code in half or less. All interrupts. Very stable. I still have a timing glitch that I am trying to solve at the top of the screen. Man I wished I had an OSCOPE.

    Anyone know how to get SXSIM to time code in an ISR? I can't seem to find it.

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  • TransistorToasterTransistorToaster Posts: 149
    edited 2006-09-23 04:30
    You can also feed the clock directly to a binary counter to generate the address during display. It would be necessary to add a multiplexor to handle the times when you write data to the SRAM and need a specific address.
    Frank
  • cbmeekscbmeeks Posts: 634
    edited 2006-09-23 04:36
    hmmmm....I hadn't thought about that. so each clock tick would increase the binary counter and change the SRAM address line???

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  • TransistorToasterTransistorToaster Posts: 149
    edited 2006-09-24 15:31
    >hmmmm....I hadn't thought about that. so each clock tick would increase the binary counter and change the SRAM address line???
    Essentially. You could make it a bit more complex in the sense that that the counter would have the bits following the three LSB hooked up to the address while the three LSB would attach to a multiplexer and select the 8 data bits. Don't use any of the 4051...4053 series multiplexers directly stand alone because of the high resistance through the switch. They might work with a NPN buffer after them. You could also use the TI 74Scbt3251 and friends family of low impedance mux switchers. For prototyping, you would need a surface mount soic to pdip adapter.
  • cbmeekscbmeeks Posts: 634
    edited 2006-09-25 11:26
    transistortoaster said...
    >hmmmm....I hadn't thought about that. so each clock tick would increase the binary counter and change the SRAM address line???
    Essentially. You could make it a bit more complex in the sense that that the counter would have the bits following the three LSB hooked up to the address while the three LSB would attach to a multiplexer and select the 8 data bits. Don't use any of the 4051...4053 series multiplexers directly stand alone because of the high resistance through the switch. They might work with a NPN buffer after them. You could also use the TI 74Scbt3251 and friends family of low impedance mux switchers. For prototyping, you would need a surface mount soic to pdip adapter.

    Thanks. I will look into that.

    I got my SRAM working with my VGA circuit. However, due to the fact that my SX Protoboard is several inches away from my breadboard (even when they are right next to each other), I have to use long (6"+) wires to drive the SRAM. This is causing problems with noise. So, I think I am going to have to mount some SRAM on the protoboard to reduce the length of the wires.

    :-/

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