Assembly details
Buddha
Posts: 25
The "Early Propeller Chip Documentation, Rev 0.1" file states that the AND instruction (and several others) set the C flag to the "parity of result". The Assembly Elements document doesn't mention the flag changes for these instructions at all.
Is C actually set in the manner that the low-level documentation suggests? And, if so, is it even or odd parity? [noparse]:)[/noparse]
Thanks for your time!
Is C actually set in the manner that the low-level documentation suggests? And, if so, is it even or odd parity? [noparse]:)[/noparse]
Thanks for your time!
Comments
Chip Gracey
Parallax, Inc.
The assembly docs state that the CMPX instruction performs "Compare-extended D to S+C" and CMPSX performs "Compare-signed-extended D to S+C".
The sign-extension part is throwing me off a little bit. Does this mean that it's actually a 33-bit operation, where S+C can overflow to 33 bits, and D is sign-extended an extra bit before the comparison?
If it's not a 33-bit operation, then what does the "sign-extended" portion mean? Where does the sign get extended to? [noparse]:)[/noparse]
Thanks for your time!