Design

jhmorris3486

Chip,

Have ya'll thought about implementing the propeller chip in a .18 micron process so that way you can get more cogs and memory per chip?

Thanks
Jason

Gadgetman

You are aware that .18 is much more expensive than the current process?

And memory is limited by the instruction set (9bit source-pointer which means a total of 512 addresses for each COG)

As I understand it, the next generation will have more COGs, more memory and be faster...
(It has been mentioned a couple of times here in the forum)

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Don't visit my new website...

Beau Schwabe

"Have ya'll thought about implementing the propeller chip in a .18 micron process...?"

Absolutely!

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Beau Schwabe

IC Layout Engineer
Parallax, Inc.

parsko

Parallax,

We have our technology conference today, were they talk about roadmaps and all this gobble-dee-guck. In my daydreaming about the Prop, I was thinking about this exact topic. I recall chip providing details as to what node the Prop was printed in.

One question that kept crossing my mind was: how many masks does it take to make a prop? How many "waste" masks did you go through before you got to the final product?

You know, in another 10 years you'll be able to Print the Prop on the head of Pin! Then there is the pins.....

-Parsko

Phillip Y.

While you are thinking about the next prop, internal flash/eeprom memory that is secure would be a good thing and reduce the number of support chips needed.