I need help with Stampworks Experiment #32 - I2C Communications
overlook77
Posts: 10
Im new to this and having trouble hooking up the schematic for experiment 32 on my Professional Dev. Board.· I dont want to fry anything.
The exp. at the beg. of the manual are easy b/c you are connecting the BS2 directly to other on-board components.· But this excercise requires you to use two resistors and the 24LC32 chip.· I do not understand how to physically place these components on the board.· Basically, I dont understand the breadboard and how to connect things to it.
Please let me know if the following is correct for the schematic:
1)· Connect the resistor from the Vdd rail (second white row on the breadboard) to a hole (B10).
2)· Connect P8 to A10 so the resistor intercepts the signal?
3)· Connect a wire from E10 to F10.··Place the EEPROM chip so·the left pins run from G-J10.
Does P9 need to be on another column b/c you have to use another resistor, like column 15?
How do the other Vdd and two Vss's connect to the chip?· Lets assume the chip goes over to column 15....is this where you connect wires to the Vdd and Vss's, on the same column 15?
If someone could look at an image of the PDB and tell me some 'coordinates' on where to put the wires and components, I would greatly appreciate it.
The exp. at the beg. of the manual are easy b/c you are connecting the BS2 directly to other on-board components.· But this excercise requires you to use two resistors and the 24LC32 chip.· I do not understand how to physically place these components on the board.· Basically, I dont understand the breadboard and how to connect things to it.
Please let me know if the following is correct for the schematic:
1)· Connect the resistor from the Vdd rail (second white row on the breadboard) to a hole (B10).
2)· Connect P8 to A10 so the resistor intercepts the signal?
3)· Connect a wire from E10 to F10.··Place the EEPROM chip so·the left pins run from G-J10.
Does P9 need to be on another column b/c you have to use another resistor, like column 15?
How do the other Vdd and two Vss's connect to the chip?· Lets assume the chip goes over to column 15....is this where you connect wires to the Vdd and Vss's, on the same column 15?
If someone could look at an image of the PDB and tell me some 'coordinates' on where to put the wires and components, I would greatly appreciate it.
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