Understanding the Debug Registers Window
John Kauffman
Posts: 653
I’m having problems understanding some of the Debug Registers Window, even after reading Daubach, Williams and the Dev System manual. For reference, a sample is shown below.
I understand the left section of the RegWin, showing the current settings for the registers that record RTCC, pin settings, etc. The middle window I can see holds the lines of code in assembly language. I can also see that the lines of code are numbered in sets:
0 00 - FF, 1 00 – FF, up to 7 00-FF.
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Am I correct that the first digit of the line numbering refers to the eight banks of programming space, each with 2K bytes?
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I do not understand the right section.
What is the purpose of this memory and which commands access it?
Is this the same physical space as what is taken by the program code in the middle window? In other words, is there any relationship between the middle box and the right box?
Is this the place where variables and data tables are kept that are available only within the same programming bank?
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I’ve read the sections of the books regarding memory and the hotel floor analogies. As I get it, the first 16 bytes of each bank is essentially the same memory and thus available to all eight programming blocks. Of those 16 bytes, 8 bytes are reserved for SX use (RTCC, RA, etc.) and the upper 8 bytes are available for variables. To relate that to the registers window:
On the block to the left the top eight rows have labels (RTCC…[noparse];)[/noparse] because they are reserved. The bottom 8 bytes do nto have labels because they are for user variables that will be available to all programming banks. Correct?
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In the block on the right, is that why each column start with the top row at $10, because from $00 to $0F are part of the universal registers?
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But why do the column labels increment by $20 instead of $10? I understand there are eight banks, but why not name them $00 to 08?
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And one last question. I understand that the physical location of W gets moved around so that one byte on the chip does not wear out. That makes me wonder if there is memory management that creates an abstraction layer between chip’s physical matrix and the register naming system. What is the relationship between the registers as we discuss and the physical arrangements on the chip?
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I would be grateful if anyone can point me to a reference that explains this. Thanks.
·
I understand the left section of the RegWin, showing the current settings for the registers that record RTCC, pin settings, etc. The middle window I can see holds the lines of code in assembly language. I can also see that the lines of code are numbered in sets:
0 00 - FF, 1 00 – FF, up to 7 00-FF.
·
Am I correct that the first digit of the line numbering refers to the eight banks of programming space, each with 2K bytes?
·
I do not understand the right section.
What is the purpose of this memory and which commands access it?
Is this the same physical space as what is taken by the program code in the middle window? In other words, is there any relationship between the middle box and the right box?
Is this the place where variables and data tables are kept that are available only within the same programming bank?
·
I’ve read the sections of the books regarding memory and the hotel floor analogies. As I get it, the first 16 bytes of each bank is essentially the same memory and thus available to all eight programming blocks. Of those 16 bytes, 8 bytes are reserved for SX use (RTCC, RA, etc.) and the upper 8 bytes are available for variables. To relate that to the registers window:
On the block to the left the top eight rows have labels (RTCC…[noparse];)[/noparse] because they are reserved. The bottom 8 bytes do nto have labels because they are for user variables that will be available to all programming banks. Correct?
·
In the block on the right, is that why each column start with the top row at $10, because from $00 to $0F are part of the universal registers?
·
But why do the column labels increment by $20 instead of $10? I understand there are eight banks, but why not name them $00 to 08?
·
And one last question. I understand that the physical location of W gets moved around so that one byte on the chip does not wear out. That makes me wonder if there is memory management that creates an abstraction layer between chip’s physical matrix and the register naming system. What is the relationship between the registers as we discuss and the physical arrangements on the chip?
·
I would be grateful if anyone can point me to a reference that explains this. Thanks.
·
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