SX52 Soft Core

Aime

Hi,

I'm in the process to releaze the first SX52 IP core in VHDL developed at the University of the West Indies, Trinidad and Tobago.
Regards,

LN.

John Couture

Aime,

Interesting. I had to look up VHDL to figure out what you were talking about but that does sound like a momumental task.

For the rest of us, Aime is talking about describing the internal structure of the SX52 using a standardized language for describing digital electronic systems (the chip internals). This language, VHDL (V Hardware Description Language, the V seems to be short for Very High Speed Integrated Circuits??), was adopted as a standard by the IEEE and is used to describe the structure of the design and its subsystems. Looks pretty interesting!

Anyway, a free download tutorial on VHDL is at:

http://tams-www.informatik.uni-hamburg.de/vhdl/doc/cookbook/VHDL-Cookbook.pdf

Aime, will you be posting your design on a web page?

For those of you that haven't been to the West Indes, GO! its a BEAUTIFUL area. I have only been as far south as Grenada but there is nothing like swiming in ocean water that is over 80 degrees (I live in San Diego area and water off our coast is about the same as Rhode Island brrrrr).

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John J. Couture

San Diego Miramar College

Aime

The VHDL coding of the SX52 Core is finished; we are presently doing some testing (Simulation & Formal Verification).
The design is well documented for those·who·are interested in using it·for an·embedded project. We haven't decided yet if it would be an open core with a GNU license.
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Aime.
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gibbman

VHDL (and Verilog) are usable by the Altera FPGAs by running them through the native Altera development tools, like Quartus(?). I am scheduled to attend an Altera 1-day training session next month, and I'm really looking forward to it. I think that Parallax developed the new Propeller chips by prototyping in Altera FPGAs, but I might be wrong on that.
Jim

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In the end, it seems that it's all about getting the LEDs to blink....

Guenther Daubach

Aime,

as you may know, have I written SXSim for Windows, a simulator for all available types of the SX. When I started this project in VB, I never thought that SXSim would be accepted by the SX communitiy as it actually is. So - besides the enhancements I have added meanwhile, I have more features in mind that turns SXSim more into an analyzing tool for the SXes.

Due to the already added new features, the code becomes larger and larger, and real-time simulation is very slow, i.e. far away from a real SX clocked at 50 MHz.

Do you think the VHDL implementation could be used as a "plug-in" for a shell program acting like the current SXSim IDE which comes close to the look-and-feel of the SX-Key IDE? For coding the IDE, I'm not stuck to VB. I could also do it in C# or C++, for example.

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Greetings from Germany,

G

Aime

Hi G

Electronegativity

Hi Aime.

What you have done sounds very similar to the Picoblaze processor core that Xilinx includes in its Embedded Development Kit.
They also have a 32 bit version called Microblaze.
I have recently become interested in programming FPGAs and it seems like these "Soft" microprocessors could make my life a lot easier. The only thing stopping me is the $500 price tag on the Xilinx EDK.

If you are offering this software for free then I will be standing outside your door with my begging bowl.

Are you a student or a professor?

-Alexander

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I wonder if this wire is hot...

Lord Steve

electronegativity,

http://www.xess.com

Aime

Hi Alexander

Yes it's. Xilinx has a free version of the ISE (Xilinx Wepack ISE ) that can be downloaded from their web site. You also need a good simulator like modelsim but it’s not free. I recall there is a good free simulator out there from http://www.symphonyeda.com/. The SX IP Core can be synthesized with Xilinx and Altera Tools.
I haven’t decided if that will be free, but certainly the design has been very tedious. This Soft core is part of a SW/HW Codesign Development tool for the SX microcontrollers.

Corning your last question, I will let you guess.

Regards,

Aime.

SteveW

Xilinx provide a free version of modelsim with ISE. It's limited in design size, so simulating whole micros isn't going to work, but it's great for pretty much everything else. I use it extensively for open designs.
(And, for anyone thinking that Microblaze and the Xilinx EDK sounds like fun, we've been using it here, and it's not really very usable yet, if you want to do more than toy projects. Give it a couple more major revisions - it's getting better fast, but, at the moment, I wouldn't wish it on my enemies...)

Steve

Electronegativity

Thanks for all the good links!

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I wonder if this wire is hot...

LoopyByteloose

Obviously the SX52 soft core would apply and be useful for the SX48.

But, I am wondering if this may help an eventual revival of the SX52?

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"When all think alike, no one is thinking very much.' - Walter Lippmann (1889-1974)

······································································ Warm regards,····· G. Herzog [noparse][[/noparse]·黃鶴 ]·in Taiwan

Aime

Hi Kramer,

Yes indeed. The core can be customized to cover the entire SX family.
I hope that will revive the Sx52.

Aime.

Assaff Rawner

Dear Aime

Can you tell me the size of FPGA required and speeds that can be achieved with your SX52 core?

Thanks
Assaff

Aime

Dear Assaff,

Please bare with me, actually we are finalize the testing on a Spartan 3-100 chip, that is to be extended to other devices of lower sizes. I cannot say any thing about the speed until the core be completed tested.


Regards,

Aime

Aime

Dear Assaff,

Please bare with me, actually we are finalize the testing on a Spartan 3-100 chip, that is to be extended to other devices of lower sizes. I cannot say any thing about the speed until the core be completely tested.


Regards,

Aime

Electronegativity

Hi everybody.

I followed John Coture's link to the VHDL cookbook.
It describes a VHDL structure called the DP32 processor.
Does this work?

Is there a decent freeware VHDL program that will emulate as a 32 bit processor?
It doesn't need to simulate an entire chip, just provide some registers and execute simple assembly code.

Thanks,
-Alexander

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I wonder if this wire is hot...

Aime

Dear Assaff,

We are still continuing with the testing and verification. So far we are synthesizing the soft core on a spartan 3-400 in
which the block rams are used to implement the 4K ROM. This is done on fly by generating the memory content in VHDL from an HEX file.
Without optimization the max speed is 112 MHz. Our intention is to have different flavours of the SX 52 Soft core (with ROM of 4K, 8K, 16K, 64K, and why not 256K for Virtex chips ) that can be generated on fly. We have also in mind to extend the soft core for parallel flasm/Ram and serial EEprom interfacing.

Regards,

Aime

dkemppai

Aime said...
Dear Assaff,

We are still continuing with the testing and verification. So far we are synthesizing the soft core on a spartan 3-400 in
which the block rams are used to implement the 4K ROM. This is done on fly by generating the memory content in VHDL from an HEX file.
Without optimization the max speed is 112 MHz. Our intention is to have different flavours of the SX 52 Soft core (with ROM of 4K, 8K, 16K, 64K, and why not 256K for Virtex chips ) that can be generated on fly. We have also in mind to extend the soft core for parallel flasm/Ram and serial EEprom interfacing.

Regards,

Aime

Interesting way to 'extend' the power of the SX Processor. Of course, you won't have access to onboard
comparator, and won't have the oscillator driver for the crystals and resonators, and probably won't have
the ability to directly support 5 volt cmos and ttl logic, but interesting none the less.

Maybe this could be a stepping stone to build a larger more powerful version of the SX. Maybe something that
supports larger math functions, etc...·· ...of course, once the IP core is built, then silicon is only a mask away...


-Dan
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