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Parallel EPROM and Basic Stamp 2 — Parallax Forums

Parallel EPROM and Basic Stamp 2

Scott KnauertScott Knauert Posts: 7
edited 2006-03-19 20:41 in BASIC Stamp
Hi all,

I've been looking to extend the memory of my stamp projects. Although I know I could get more advanced stamps with more memory, or use an expensive serial eeprom, I really want to incorperate many of the parallel eprom and eeprom chips I currently have lying around. I have literally hundreds of 27/29C256 (64 KB) and all sizes up to 29C016 (2 MB) size chips around. As you can see I could add far more flash memory by adding some type of parallel eeprom interface than I could easily get via stamp upgrade or serial eeprom. I have the chips since I saved them for repairing motherboards, and making etherboot images for NICs. I also have a eprom programmer and UV eraser so even the older 27 series chips could be of use in certian applications. I know that a stamp doesn't have the necessary number of IO lines to communicate directly, which also wouldn't be desirable, I don't just want to be able to interface with an eeprom, so some kind of glue logic is required. I was wondering what chips might be needed and where I could go to learn about such serial/ parallel interfaces?

Thanks in advance.

Comments

  • PJAllenPJAllen Banned Posts: 5,065
    edited 2006-03-18 04:44
    · Basically -- Shift Registers (parallel-in, serial-out; serial-in, parallel-out). ·74HC164, 74HC165
    · There are Shift Registers with latching outputs, tri-state outputs, many forms.
  • Paul BakerPaul Baker Posts: 6,351
    edited 2006-03-18 05:43
    Scott you are aware that you couldn't excecute code from the EPROMs correct? The interpreter on the chip only knows to look for a I2C EEPROM connected to specific pins. And since you cant program them (unless you intend on incorporating a programming voltage in your circuit) they could only be used as a storage for data tables of constants.

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  • GadgetmanGadgetman Posts: 2,436
    edited 2006-03-18 14:46
    It is possible, though not easily, to use parallell EPROMs as storage.
    (Not program storage, the BS2 can't be adapted for that, thogh)

    Take a look at the DataPak info on this PDA:
    http://home.c2i.net/trygveh/english/gadgetman/pocket/psion/org1.html
    It stores all user-entered data on EPROMs

    Two caveats with this method:
    1. You'll need a programming-pulse (12V or 21V) and know the timing-requirements of the EPROMs you're using.(Assuming 27cxxx chips)
    2. While a sequential search works fast, random-access is slooooow...

    Using serial-parallell shift-registers gives a slower sequential-access, but much faster random-access.

    Before designing your setup, I suggest you think really hard about what you're going to use them for.

    Oh, and a 27C256 is 32KB, not 64KB...

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  • Bruce BatesBruce Bates Posts: 3,045
    edited 2006-03-18 15:14
    Scott -

    The other thing to keep in mind is the absolute and needless waste of pin ports, which are one of the more valuable resources on a microcontroller. It just doesn't make any practical sense to use parallel access, when you could pick up a few serial accessed EEPROMs as samples, at no cost at all!

    Regards,

    Bruce Bates

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  • Scott KnauertScott Knauert Posts: 7
    edited 2006-03-19 03:22
    Thanks everyone for all the info. Before I didn't know where to begin, now I have a rough idea of what to do.

    I'm well aware that the eeproms can't be used for program information in the normal sense, no PBASIC tokens. Of course I could store a table of values that corresponded to actions like in Chapter 4 of Robotics with the Boe-Bot. I'm also aware that a serial eprom would be easier hardware-wise. Thanks for the hint about free samples I will definitely check into that, but I have the parallel eeproms already.

    I looked into shift registers, and am leaning towards a solution involving them. If I an understanding correctly, using two sets of shift registers, I could theoretically read an eeprom. I would need at least two shift registers one serial to parallel (address), one parallel to serial (data). The address might either need a larger shift register or multiple connected since it's bigger than 8-bit, but wouldn't require any more pins than a single register. This total arrangement would use 5 pins on a stamp, the one extra for output enable. Programming could be done by using write enable, supplying the proper voltage and waiting. So for full read and write its 6 pins vs. 2 for a serial eeprom.

    While I can see how sequential reads might be slightly slower, I don't see it being that much slower. With a register method rather than advancing the counter 8 pulses and reading, it would involve sending the bit length of the address register, i.e. 16-20. Using a parallel interface wouldn't really allow faster reading than a serial one, instead of reading 8 pins, it would be reading 1 pin 8 times and sending 8 clock pulses. My main question here is how fast can a BS2's pin change states? I seem to recall 145 microseconds for a high or low, around 1000 microseconds for a byte of shiftout, with 300 us of time between bytes, and 1300 us for a byte of shiftin. Since reading 8 pins and collecting the values would be equivalent to a shiftin, the real different is in the extra address data, a byte of shiftout. A 1.3 ms difference, which I get could be important in time critical applications.

    My plan is to double check if I already have some shift registers lying around, if not I'll get some. Then to first use LEDs and dip switches to interface with the stamp. Once I get everything working, testing a pre-programmed eprom and maybe even try to read and write with a 5V eeprom. If I get some serial eeproms I can compare. I think the extra time due to multiple shiftouts (for the instruction set) would make the reading very comparable to parallel eeproms.

    Thanks again.
  • Bruce BatesBruce Bates Posts: 3,045
    edited 2006-03-19 07:54
    Scott -

    There is at least one other issue you'd better consider before buying anything. You need to get datasheets for each of the PROMs, EEPROMs or other devices you're intending on using, and investigate the specific timing for each of the signals required.

    With devices addressed serially, there is always appropriate time provided between signals, so they can be issued sequentially, and not in tandem. This may not or may not be true on a parallel addressed device particularly if the device was designed for use on a bus-type system.

    Regards,

    Bruce Bates

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  • Scott KnauertScott Knauert Posts: 7
    edited 2006-03-19 20:41
    Thanks for the words of caution. I've been going through datasheets for all the chips we've been talking about the whole time to learn about them. I actually was able to find some shift registers, so for my first trials I won't have to buy anything. I'm not 100% sure what you mean regarding timing but I think it's one of the following:

    As far as reading goes, my parts are speced in the nanosecond range. The oldest eproms I have are around 240 ns. This is many orders of magnitude faster than the stamp. Out of the shift registers I have, many 74LS164s and 74164PCs, the LSs have a min of 20 ns, while I haven't been able to find a datasheet for the PCs my guess is that it is also much faster than my stamp. While I'd love to be able to interface as fast as possible, going slower shouldn't give the chips any problems.

    As for address control, since the parallel e/eeproms don't have a command set, I need to use the output enable pin. When changing the address, it should be low so the data pins don't change, then I cycle it (low to high to low), read the data and repeat. There is a slim chance I might run into timing issues if I just tied it high (on a eprom or read-only application) to save pins and relied on the fact that the stamp is much slower to make sure I was reading the right data.

    Another thought was that you might be suggesting the data would clear state on the data pins after a set time. I don't believe this is the case.

    One final thing, I know I only have only found serial to parallel shift registers, I still have many boxes of chips to go through and if all else fails, I could just use a parallel interface to start. Hopefully by next post I should have something put together and working!
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