Understanding signals question !
tobon48
Posts: 22
Hi!
In Chapter 4 R/C Circuits and Variable Resistors page 51 you can read:
... when the I/O pin was set to an input, thereby making it high impedance ...
should't it be low impedans ? how can the R/C net discharge trough an high impedans ?
regards
tobon48
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Quidquid latine dictum sit, altum sonatur.
Whatever is said in Latin sounds profound.
Post Edited (tobon48) : 3/13/2006 6:06:15 PM GMT
In Chapter 4 R/C Circuits and Variable Resistors page 51 you can read:
... when the I/O pin was set to an input, thereby making it high impedance ...
should't it be low impedans ? how can the R/C net discharge trough an high impedans ?
regards
tobon48
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Quidquid latine dictum sit, altum sonatur.
Whatever is said in Latin sounds profound.
Post Edited (tobon48) : 3/13/2006 6:06:15 PM GMT
Comments
-Martin
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Martin Hebel
Perform an Employer's Survey of Electronic Technologies Graduates· - Click here!
Personal Links with plenty of BASIC Stamp info
and SelmaWare Solutions - StampPlot - Graphical Data Acquisition and Control
But you got to have a closed loop for the current to flow !
tobon48
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Quidquid latine dictum sit, altum sonatur.
Whatever is said in Latin sounds profound.
Pin goes high as output, charging the capacitor, so the cap has + on the top.
Pin goes to input to measure RCTIME. This allows the capacitor to discharge from + (top) through R to Vss.
The time it takes the capacitor to go from 5V (1) to 1.4V (0) is what is measured for RCTime.
That help?
-Martin
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Martin Hebel
Perform an Employer's Survey of Electronic Technologies Graduates· - Click here!
Personal Links with plenty of BASIC Stamp info
and SelmaWare Solutions - StampPlot - Graphical Data Acquisition and Control
That's right ,but it means that "Pin" must be close to Vss for the current to flow.
tobon48
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Quidquid latine dictum sit, altum sonatur.
Whatever is said in Latin sounds profound.
-Martin
But look at your scematic , you have a closed loop.
If it function like you said R wouldn't have any effect .
tobon48
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Quidquid latine dictum sit, altum sonatur.
Whatever is said in Latin sounds profound.
The larger the resistor is, the lower the current will be: I = V/R
Low lower the current is, the longer it takes the capacitor to discharge.
Or, the large the capacitor is, the more charge there will be so, again, longer time.
t = 1.1RC
As R or C increases, t (time) increases.
-Martin
·
··· Pin
···· !
···· !
···· C
·····!
···· R
···· !
··· Vss
If Pin not connected or high impedans no current can flow trough R , you must have a closed loop for current to flow.
tobon48
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Quidquid latine dictum sit, altum sonatur.
Whatever is said in Latin sounds profound.
·(+)side of capacitor --> Resistor --> to (-)side of capacitor
Someone will have to take it from here, I apparently can't state it in a way to be understoop.
-MH
I saw now on your schematic that the resistor and capacitor was coupled in parallell, but in the text in Understanding Signals the resistor and capacitor are coupled in series.
tobon48
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Quidquid latine dictum sit, altum sonatur.
Whatever is said in Latin sounds profound.
Post Edited (tobon48) : 3/13/2006 6:39:44 PM GMT
On page 51 you said .... "... when the I/O pin was set to an input, thereby making it high impedance ...". This is a correct
statement, if you read further on the same page you will also see...."Different resistor sizes affect the charge or discharge time",
however there has not been a reference to a schematic yet.
On page 52 (ACTIVITY #1) ....Here you are not using the RCTIME function yet, instead the goal is to measure the resistor/capacitor
time constant with the circuit you indicate. Notice, the code available for this activity (page 54) does not set the pin as an INPUT,
but instead keeps it an OUTPUT or "low impedance" so that you can see the charge/discharge curves of the capacitor through the
resistor on a scope.
On page 57 (ACTIVITY #2) ...Introduces you placing a resistor in "parallel" to the capacitor to determine the discharge time of an
RC network. Here, the code is available on page 59, which does make use of the RCTIME command.
The description that you refer to on page 51 tries to explain the inner-workings of what the RCTIME command does when
you use the command in your program.
Reference:
www.parallax.com/dl/docs/prod/sic/Signals.pdf
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Beau Schwabe
IC Layout Engineer
Parallax, Inc.
Post Edited (Beau Schwabe (Parallax)) : 3/13/2006 7:21:12 PM GMT
As I initially stated, I didn't look in the text for the exact figure, and Parallax shows it 2 different ways depending on the text, but the principles are the same.· The Power supply itself acts as the path for the closed loop.· Sorry for the confusion.
So, from +Cap --> resistor --> Vdd --> P/S -->Vss --> -Cap
-Martin
I think when the I/O pin is an input it's high impendance because the R/C will discharge through VSS not the I/O pin thereby making it "high impedance".
I was reading on page 51 and looked on page 52 [noparse];)[/noparse]
tobon48
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Quidquid latine dictum sit, altum sonatur.
Whatever is said in Latin sounds profound.