Propeller Architecture/Functionality Overview
Hi Propeller Enthusiasts;
This might help you better understand the inner workings of the Propeller:
Any COG can run either SPIN code (interpreted) OR ASSEMBLY code (native)... not both simultaneously.
At boot time the system clock is defaulted to INTERNAL RC 12 Mhz, and one COG (COG 0) is loaded with the SPIN interpreter from MAIN_ROM and starts executing SPIN code from MAIN_RAM.
That is your SPIN application which then further decides what happens.
The SPIN high level language is really an interpreter that may be loaded from MAIN_ROM memory into any number of COG's RAM, and each such instance then executes from it's COG's RAM to interpret token code and data that is stored in the MAIN_RAM memory all of which is accessible by all COGs in an orderly manner.
Any COG, whether assigned to run SPIN or ASSEMBLER can access all of MAIN_RAM as well as MAIN_ROM, one COG at a time, in an orderly manner controlled by the HUB.
Custom characters, Sine tables, Log tables and Anti-Log tables are all stored in MAIN_ROM
Any SPIN COG can stop any COG (including itself), or launch new COGs to run either SPIN (interpreted) or ASSEMBLER (native)... your whole instance of ASSEMBLER code MUST fit into it's COG's 512 longs (2K byte) memory.
Any ASSEMBLER COG can stop any COG (including itself), or launch any COG with assembler (somewhat tedious).
An ASSEMBLER COG runs native code in its private memory, and also can access all of MAIN_RAM, albeit somewhat slower
All COGs continuously have access to the single common system timer.
Any COG can be "waited" until the system timer (32 bits) reaches a certain value, upon which it immediately carries on.
Any COG can be "suspended" until the I/O pins (32 bits) match some 32 bit masked pattern, or alternately do not match that pattern, upon wich it immediately carries on.
Each COG has 2 independent timers.
Each COG has a fancy video shift register.
Each COG has access to all 32 I/O port bits, on an orderly non-competition basis controlled by the HUB.
Each COG can switch the clock mode (internal RC/external/PhaseLockedLoop) as well as clock speed at any time.
All COGs are identical any can do any of the functions.
I believe I have this all correct, but please pardon me if I have some error.
Cheers,
Peter (pjv)
This might help you better understand the inner workings of the Propeller:
Any COG can run either SPIN code (interpreted) OR ASSEMBLY code (native)... not both simultaneously.
At boot time the system clock is defaulted to INTERNAL RC 12 Mhz, and one COG (COG 0) is loaded with the SPIN interpreter from MAIN_ROM and starts executing SPIN code from MAIN_RAM.
That is your SPIN application which then further decides what happens.
The SPIN high level language is really an interpreter that may be loaded from MAIN_ROM memory into any number of COG's RAM, and each such instance then executes from it's COG's RAM to interpret token code and data that is stored in the MAIN_RAM memory all of which is accessible by all COGs in an orderly manner.
Any COG, whether assigned to run SPIN or ASSEMBLER can access all of MAIN_RAM as well as MAIN_ROM, one COG at a time, in an orderly manner controlled by the HUB.
Custom characters, Sine tables, Log tables and Anti-Log tables are all stored in MAIN_ROM
Any SPIN COG can stop any COG (including itself), or launch new COGs to run either SPIN (interpreted) or ASSEMBLER (native)... your whole instance of ASSEMBLER code MUST fit into it's COG's 512 longs (2K byte) memory.
Any ASSEMBLER COG can stop any COG (including itself), or launch any COG with assembler (somewhat tedious).
An ASSEMBLER COG runs native code in its private memory, and also can access all of MAIN_RAM, albeit somewhat slower
All COGs continuously have access to the single common system timer.
Any COG can be "waited" until the system timer (32 bits) reaches a certain value, upon which it immediately carries on.
Any COG can be "suspended" until the I/O pins (32 bits) match some 32 bit masked pattern, or alternately do not match that pattern, upon wich it immediately carries on.
Each COG has 2 independent timers.
Each COG has a fancy video shift register.
Each COG has access to all 32 I/O port bits, on an orderly non-competition basis controlled by the HUB.
Each COG can switch the clock mode (internal RC/external/PhaseLockedLoop) as well as clock speed at any time.
All COGs are identical any can do any of the functions.
I believe I have this all correct, but please pardon me if I have some error.
Cheers,
Peter (pjv)
Comments
Andre'
Right; I understood that to be the case, and I thought I said that adequately in line 4 describing the boot process.... no?
I think your reference comes from the next item where I wanted to indicate that you did not neccessarily need to load any SPIN interpreters beyond the one automaticalyl loaded by the booter.
Regardless, I believe these posts have now made it definitively clear.
Cheers,
Peter (pjv)
Is there, or could there be a simple, in built, NULL process which used few if any resources, just to satisfy the first-comes-Spin requirement?
Regards,
Bruce Bates
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PUB Start
· COGINIT(0,@asm, 0)·· 'restart Cog0 with assembly code
DAT
···· org
asm· jmp #asm·· 'assembly program, just loops
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Chip Gracey
Parallax, Inc.
Chip -
At the possible risk of being drawn and quartered at dawn - inline questions:
' PChip Biology - Dissection - Over-complication of the world's simplist Spin Example
PUB Start··················· 'Spin directive DEF PUB method block - okay
· COGINIT(0,@asm, 0)·· 'Restart Cog0 with assembly code .. probably at rel loc 0?
DAT··'Spin command - Declare DATA Block; yet no obvious data extant here?
····· '· May be dummy syntactical EOB indication for prior PUB Start?
'* - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - *
'* - *
'* - * Suspect this remark is an un-indicated line of deleneation twixt·
'* - * one Spin program and one ASM program; else you CAN drop from Spin
'* - * into ASM which was said to violate the principles of operation!
'* - *··································································· * - *
'* - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - *
···· org··· 'Probably the equivalent of ORG· * ("Start here")?
···· 'ORG Start - Had it been used, almost might have made more practical sense?
···· 'Have we given up any of the area used by the prior Spin program above?
asm· jmp #asm·· 'assembly program, just loops - just proves the "This is ASM" point?
Regards,
Bruce Bates
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For those who care.....
I've just done some speed tests at 80 MHz:
Spin launching an assembler cog takes about 12 uSec.
Spin launching a spin cog takes about 225 uSec.
Now need to see about assembler launching assembler & spin.
Post Edit...
Finally got an assembler to launch an assembler, and that procedure takes about 110 uSec
Cheers,
Peter (pjv)
Post Edited (pjv) : 3/7/2006 12:51:43 AM GMT
Daniel
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·1+1=10