The discussion of memory in the marathon thread got me thinking about data transfer, and I think this topic is worthy of its own thread.
Using a traditional serial transfer protocol on one line with one 80 MHz processor gives you 80Mb/s
With 8 processors it is obvious that you could extend this to 640 Mb/s, but is it possible to do better?
Having 32 I/O pins seems to open up greater possibilities for parallel data transfer.
With an SX you could the transfer data on 8 parallel lines simultaneously by hooking up each of the pins of a register to one of the data lines and then arranging the data in bytes with everything that will go down line 1 in the first bit, data for line 2 in the second bit etc. By sequentially moving these bytes into an output register you could transmit (or recieve) data at 4 times the clock speed (since the MOV instruction takes 2 clock cycles).
Like my fellows I hunger for more information.
Surely the registry structure is not going to change over the next 2 months.
Maybe we could have just this one teensy morsel?
I wonder if this wire is hot...