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Rfid * 2

SweLoganSweLogan Posts: 11
edited 2006-02-20 18:05 in BASIC Stamp
Hi i have 2 RFID Reads, how do i to scan them good so i can use them i a door open system.
One RFID on each door, check if the tag is valid in a computer then send a puls to the right door so it opens.

After a time this system will have more than 2 reders, so how to do this right form the bigining?

And how secure is this RFID? Can i use this system i a office?

Comments

  • John R.John R. Posts: 1,376
    edited 2006-02-19 00:15
    The sample software shows how to do the "security" comparison. Sending the data to a PC and getting an "Authorized" or "Unauthorized" code back shouldn't be too bad using VB or other tool and serial communication. I would use this approach, and then have the stamp release the door latch (via relay, etc.). If there are a limited number of tags, you could probably forgo the PC and store the valid tags on the STAMP.

    To use multiple readers, you just "repeat" the code using a different input pin. The readers also have the ability to be "disabled" and "enabled" if you need to "shut down" the ability for a door to be used during some hours.

    The tags used by the Reader have a "unique" number, and should be failry secure. I suppose if someone knew a "good" number, and had a writeable tag that used the same frequency, they could duplicate a tag. I believe this would be no easier, and probably less likely than someone duplicating a key.

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    John R.

    8 + 8 = 10
  • SweLoganSweLogan Posts: 11
    edited 2006-02-19 00:48
    mkay, so the code shuld be like this then
    Main:
    Enabel Read1
    Read Reader1
    if Reader1 <> "" Then go to check
    disabel redaer1

    Enabel Read2
    Read Reader2
    if Reader2 <> "" Then go to check
    disabel redaer2
    Goto main

    But how fast is the code, if reader 2 is disabel when a person use the tag on reader2 what will hapen??
    I must have the PC to logg the trafick in the doors.
    And after thinking off your argument off this "duplicating a key" i think to it is safe to use.

    Sorry about my eng, i am form sweden...
  • John R.John R. Posts: 1,376
    edited 2006-02-19 04:02
    Your english is fine, don't worry.

    Yes, the "duplicating a key" should not pose a security problem.

    There really isn't a need to "disable" the readers, unless you have two of them very close together. In this case, they may both read the same key.

    The processor should be fast enough to go back and forth. In worse case, your users will not get the feedback of the door releasing, and will try again. We're talking less than a second to check for a read and go to the next reader. You'll likely see more of a delay when you get a read, send it to the PC to be logged and return the "open/don't open" code. Again, this should only be a few seconds (at most) and the user at the second door would just try again.

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    John R.

    8 + 8 = 10
  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2006-02-19 07:40
    Two obstacles you will have to overcome.· First of all you haven't published the full code, but if I had to guess I would say you have a standard SERIN waiting for data from a reader.· While doing this the BASIC Stamp will not do anything else.· You will need to specify a timeout period which it can check the other reader, which will also require a timeout.· Second, if you plan on adding more readers, you will likely either need to switch to the SX or you will need multiple BASIC Stamps talking·to·a master stamp.

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    Chris Savage
    Parallax Tech Support
    csavage@parallax.com
  • John R.John R. Posts: 1,376
    edited 2006-02-19 09:56
    Chris;

    For a "door opener" where the timeout could be short, and you could come around to each again fairly quickly, and if the user had bad timing they would just "try again", why the concern about needing more than one stamp? Is the worry that the serial signal from a given reader would get "lost" into the bit bucket while others are being checked and/or processed? I'm not challenging you, just asking for clarification, both for Logan and myself.

    If this is the concern, I assume that in the not too distant future, a Propeller would also be a viable option (one cog for each reader, one to pass to/from the PC)?

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    John R.

    8 + 8 = 10
  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2006-02-19 18:06
    John,

    ·· You are correct, it is really a matter of timing.· It would take some empirical testing to find out how well this system would function as well as some clever timeout values that don't take too long, but also leave time to receive data if it happens to be coming in.· A faster processor like the SX could easily run an ISR checking multiple serial inputs and buffering the incoming data.· Al williams had just such a project listed in his SX Assembly Book which could receive serial data from multiple sources and send it to a Stamp Module using handshaking so that the Stamp would not miss any data.


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    Chris Savage
    Parallax Tech Support
    csavage@parallax.com
  • GotenGoten Posts: 70
    edited 2006-02-20 12:49
    Hello Swelogar,

    I·posted a simple rfid control access project on the "project" forum, only one Rfid reader module, but i guess that u could use·a similar algorithm:

    hthttp://forums.parallax.com/showthread.php?p=571495

    Chris, u said "the SX could easily run an ISR checking multiple serial inputs" what's an ISR? maybe it's a really dumb question, but i really don't know what mean. As i can see if Swelogan use a SX processor he could be able to get enable the 2 rfid reader at the same time??

    And last questions, what means "Al williams".

    Sorry·about the·"ñe" questions.

    Luck Swelogan.

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    Best Regards from Chile

    Goten

    chilebot3.jpg
  • Bruce BatesBruce Bates Posts: 3,045
    edited 2006-02-20 13:18
    Goten -

    The acronym ISR is generally accepted in computer circles as meaning "interrupt service routine". This is any routine or subroutine which is invoked when an interrrupt occurs on a computer processor. Generally they are classified as first level and second level, although on less complex processors (microcontrollers fall into this category) there may be only one level of ISR.

    When there are two levels, they serve two integrated but distinctly different purposes. Here is just an overview of how they are used, and what their respective responsibilites generally are:

    A Level I ISR often MUST be very small in size, and very fast in action. It may have control for an extremely limited period of time; thus it must get in and get out quickly. Generally it has just a few responsibilities during this limited period of time. It must obtain and/or provide a register save area (if necessary) and make the determination of what type of interrupt occurred and when/where it occurred. It merely stores that information for future reference in the Level II ISR routine. It then "resets" the hardware interrupt flags, so that particular interrupt is re-enabled for use. It is able to do this since all of the necesssary information has been saved. It then relinquishes control back to the operating system, or to the processor, as the individual case may be.

    A Level II ISR has much more (but usually not unlimited) memory available to it, for its use. It also is not contrained by the same immediacy as a Level I ISR, although since it IS generally a "system routine", or overhead process, it is expected to be prompt in its execution, not wasting any undue time in the process of its operation. It will save the registers, if it is required to do so, fetch the previously stored information regarding the specifics of the last interrupt, and process it accordingly. Once done, it restores the registers (if required to do so) marks the register save area as available for use, and as before it then relinquishes control back to the operating system, or to the processor, as the individual case may be.

    That's the whole basic process in a nutshell, although it may be much simpler than that on lower level processors, such as microcontrollers or micro processors.

    Regarding Al Williams, among many, many other things, Al has written a very helpful book for SX Programmers. Here is a link to that book, which you can purchase, or download from the Parallax web site for FREE:
    http://www.parallax.com/sx/index.asp (bottom of the page)

    Regards,

    Bruce Bates

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    Post Edited (Bruce Bates) : 2/20/2006 1:26:18 PM GMT
  • GotenGoten Posts: 70
    edited 2006-02-20 14:23
    i really appreciate your answer Bruce. turn.gif

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    Best Regards from Chile

    Goten

    chilebot3.jpg
  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2006-02-20 18:05
    ISR routines on the Z80 were a little more complex than that even.· That particular CPU has both NMI and IRQ lines.· The NMI must occur if triggered while the IRQ can be disabled, have it's mode changed (how it reacts) and of course, you could have 8 vectors from 8 interrupting devices.· This was tricky to balance in a complex system.

    Anyway to what I was getting at, Al's routine reads incoming serial data in the interrupt routine and can handle more than one channel.

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    Chris Savage
    Parallax Tech Support
    csavage@parallax.com
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