2 * ADC0838 problems
Hi fellow stampers..
I hooked up one ADC0838 on my PDB with BS2pe and finally got it to work using code I found on the forum and pin/chip connectivity from a related website link. I thought it would be nice to be able to cascade these chips incase you needed more than 8 analog inputs so I added a second chip. When using the same data and clk lines and a new CS line, the first chip continued to work ok but the second faults. The problem seems to be that the high bit in the result is set to 1 improperly. There are other weird things as well. If you have 2 ADC0838 chips you can easily wire this up and check it out. Comments in my attached code give all pin assignments for stamp and chip.
When the first attempt failed, I tried a 2nd, using separate data, clk, and CS lines ( this is what shows in the attached code). This produces the same sort or error..the high bit in the result is forced to 1 improperly.
Can anyone fault the code or shed some light on this problem? It would be nice to cascade these chips using a common data/clk line.. kind of like the expansion of input and output ports using 74HC595(out) and 74HC165(in).
thanks, John
ps. swapping the code blocks.. swaps the problem..so the error would appear to be in the code
I hooked up one ADC0838 on my PDB with BS2pe and finally got it to work using code I found on the forum and pin/chip connectivity from a related website link. I thought it would be nice to be able to cascade these chips incase you needed more than 8 analog inputs so I added a second chip. When using the same data and clk lines and a new CS line, the first chip continued to work ok but the second faults. The problem seems to be that the high bit in the result is set to 1 improperly. There are other weird things as well. If you have 2 ADC0838 chips you can easily wire this up and check it out. Comments in my attached code give all pin assignments for stamp and chip.
When the first attempt failed, I tried a 2nd, using separate data, clk, and CS lines ( this is what shows in the attached code). This produces the same sort or error..the high bit in the result is forced to 1 improperly.
Can anyone fault the code or shed some light on this problem? It would be nice to cascade these chips using a common data/clk line.. kind of like the expansion of input and output ports using 74HC595(out) and 74HC165(in).
thanks, John
ps. swapping the code blocks.. swaps the problem..so the error would appear to be in the code
bpe
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Comments
· data buss
*---/\/\/---·Do
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·················· +
Di
Doing this prevents the output state of the Do pin from affecting data going to the Di pin.
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Jon Williams
Applications Engineer, Parallax
How did you figure that out? Is it on the data sheet somewhere?
What size of resistor do you recommend?
I also tried seprate CS,CLK,DATA lines but that seemed to give the same error. How would you explain that?
· They're not edge-triggered,·they're logic·level (on or off.)
Post EDIT:· I've attached this program having added HIGH CS and HIGH CS2 after the ends of the FOR...NEXTs
[noparse][[/noparse] Only the Conversion is initiated by the HI-to-LO transition of CS, but the Chip is STILL selected if it remains LO. ]
Post Edited (PJ Allen) : 2/17/2006 1:51:13 AM GMT
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Chris Savage
Parallax Tech Support
csavage@parallax.com
I was continuing to experiment and had actually tried what you suggested which I continue to do. I still had some problems with the result/output. Jon's original idea of resistor across DO (chip data out pin 14)·DI (chip data in pin 17) led me to try separate lines. Of course after so many changes I finely messed up some of the wires.. recommented stuff to avoid this.. then got some stuff working and fine tuned it. (see attachment)
The end result appears to be: (w.r.t. multichip ADC0838 projects)
1) you can use common CLK line across chips
2) you can connect DI to DO on each chip
· .. connect this to the 'DATA' line shift I/O
3) you must use separate 'DATA' lines for each chip..else get bad results
I added an outside DO LOOP to continously scan. How could you calculte the time it takes to scan the 2 chips?
thanks, John
ps. only tested 2 chips both with 8 single inputs voltages with common grnd.
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Jon Williams
Applications Engineer, Parallax