RAMTRON Hold and WP pins ?
inaki
Posts: 262
I am testing a FM25640 Ramtron chip (8KB).
For testing purposes I am holding high, hardwired,·pins HOLD and WP.
I am only managing the pins CS, SO, SI and SCLK.
I am using port C, pins 0 to 3.
The problem is that I cannot read back the data I am writing. I always get zero when reading.
Is it right to have the pins HOLD and WP high all the time ?
This is how I write and read one byte:
Enable CS (that is, put it to zero)
Shiftout of the command Write Enable (6) (MSB first)
Disable CS (put it to one)
Enable CS
Shiftout of the command Write (2)
Shiftout of zero (address·high byte)
Shiftout of zero (address·low byte)
Shifout of data $5A
Disable CS
Enable CS
Shiftout of command Read (3)
Shiftout of zero (address·high byte)
Shiftout of zero (address·low byte)
ShiftIN of data to be read
Disable CS
It is supposed I should read $5A but I read $00.
Do you see anything wrong with this scheme ?
To be honest I am starting to wonder·if the Ramtron chip is working at all !
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For testing purposes I am holding high, hardwired,·pins HOLD and WP.
I am only managing the pins CS, SO, SI and SCLK.
I am using port C, pins 0 to 3.
The problem is that I cannot read back the data I am writing. I always get zero when reading.
Is it right to have the pins HOLD and WP high all the time ?
This is how I write and read one byte:
Enable CS (that is, put it to zero)
Shiftout of the command Write Enable (6) (MSB first)
Disable CS (put it to one)
Enable CS
Shiftout of the command Write (2)
Shiftout of zero (address·high byte)
Shiftout of zero (address·low byte)
Shifout of data $5A
Disable CS
Enable CS
Shiftout of command Read (3)
Shiftout of zero (address·high byte)
Shiftout of zero (address·low byte)
ShiftIN of data to be read
Disable CS
It is supposed I should read $5A but I read $00.
Do you see anything wrong with this scheme ?
To be honest I am starting to wonder·if the Ramtron chip is working at all !
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Comments
Perhaps your shiftin and shiftouts aren't working right - are you using asm or SX/B?
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SX-Key + SX48 + Proto Board + SX-Key Software + Computer + USB to Serial Adapter + Resistor + LED = Blinky LED!
If you were to post your code (rather than what you THINK it is doing) someone might be able to help you.
If it's assembler, I can help, but I'm afraid not if it's SX/B......I have not yet got around to the nuances of that.
The serial RAMTRON chip works great for me.
Cheers,
Peter (pjv)
'The following code·is intended to·write a $5A byte on address zero and then read it back.
'I·am using a·FM25640 Ramtron chip (8KB, 5Mhz)
CS VAR ·RC.0
SCK VAR RC.3
SI VAR RC.2
SO VAR RC.1
MyData VAR byte
TRIS_C = %00000010
·CS = 0
·SHIFTOUT SI, SCK, MSBFIRST, 6· 'W-ENABLE
·CS = 1
'WRITE a byte on address zero
·CS = 0
·SHIFTOUT SI, SCK, MSBFIRST, 2· 'WRITE
·SHIFTOUT SI, SCK, MSBFIRST, 0· 'adr high
·SHIFTOUT SI, SCK, MSBFIRST, 0· 'adr low
·SHIFTOUT SI, SCK, MSBFIRST, $5A· 'data
·CS = 1
'READ address zero
·CS = 0
·SHIFTOUT SI, SCK, MSBFIRST, 3· 'READ
·SHIFTOUT SI, SCK, MSBFIRST, 0· 'adr high
·SHIFTOUT SI, SCK, MSBFIRST, 0· 'adr low
·SHIFTIN· SO, SCK, MSBPRE, MyData
·CS = 1
·end
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You may need a delay between lowering CS and shifting out the data.
Bean.
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These are the directives I use to set frequency:
DEVICE········· SX28, OSCXT2, TURBO, STACKX, OPTIONX
FREQ··········· 4_000_000
I have not tried with delays after CS setting. I will try.
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I have tried also to read Status Register to see if there is some characteristic pattern, but I get zero.
I mounted the SMD chip over a standard socket by soldering wires between the chip pins and the socket.
I wonder if I may have burnt the chip when soldering the pins to the socket or perhaps the wires are too long? They are about 5mm long.
How has everyone mounted the RAMTRON chip: making a SMD PCB, wiring to a socket, using an adapter,... ?
Fortunately I bought 4 chips, so I can try again with a new chip.
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http://forums.parallax.com/showthread.php?p=552218
Regarding delays, I would especially put a delay between CS=1 and CS=0 -- this might be too fast.
I mounted my fram with a SparkFun board.
HTH,
Keith
Post Edited (Keith M) : 1/31/2006 3:52:18 AM GMT