When talking about TTL and CMOS in regard to I/O pins, you are·really only talking about the input logic threshold values - the values at which a device will see a voltage as 'low' or 'high':
TTL:·low<1.4V<high
CMOS:· low<Vdd/2<high
Output from the SX is as outlined in the Spec sheet is:
low: (max) 0.6V
high: (min) Vdd-0.7V
which you can use to interface with a·CMOS or TTL device equally well.
Lightfoot
Posts: 228
Comments
TTL:·low<1.4V<high
CMOS:· low<Vdd/2<high
Output from the SX is as outlined in the Spec sheet is:
low: (max) 0.6V
high: (min) Vdd-0.7V
which you can use to interface with a·CMOS or TTL device equally well.
Nate
Post Edited (Nate) : 12/18/2005 11:03:26 AM GMT