SX28 Master/Slave I/O series resistor question
Thomas Taylor
Posts: 27
Greetings from the Pacific Northwest,
First, is it necessary to provide some·value of series limiting resistor between the·transmitting output pins on a Master SX and the receiving input pins on a Slave SX? (And what value would be best?)
If the preceding is true, with multiple Slave chips, would the resistors be best placed on each interconnected input pin of each Slave (to provide isolation from each other), as opposed to one resistor on each output pin of the Master. (I'm thinking the former would be the preferred configuration because of the following thoughts.)
I think the fundamental question I have is:· With several·SX28s·powering up at the same time·- therefore several programs all starting near the same time - in this not so perfect world - all of the I/O pins will not·arrive at their assigned mode·at the same time. I suppose wonderful things·could·happen in all those·undefined combinations of I/O conditions. Is this true?
It would be nice to save the real-estate on the PCBs by not having to add more resistors, but I want to be as safe as possible.
To resist or not resist...That is the question.
Thanks for reading.
Tom
(The creek is up and the micro-hydro is making watts!)
First, is it necessary to provide some·value of series limiting resistor between the·transmitting output pins on a Master SX and the receiving input pins on a Slave SX? (And what value would be best?)
If the preceding is true, with multiple Slave chips, would the resistors be best placed on each interconnected input pin of each Slave (to provide isolation from each other), as opposed to one resistor on each output pin of the Master. (I'm thinking the former would be the preferred configuration because of the following thoughts.)
I think the fundamental question I have is:· With several·SX28s·powering up at the same time·- therefore several programs all starting near the same time - in this not so perfect world - all of the I/O pins will not·arrive at their assigned mode·at the same time. I suppose wonderful things·could·happen in all those·undefined combinations of I/O conditions. Is this true?
It would be nice to save the real-estate on the PCBs by not having to add more resistors, but I want to be as safe as possible.
To resist or not resist...That is the question.
Thanks for reading.
Tom
(The creek is up and the micro-hydro is making watts!)
Comments
Perhaps someone with intricate knowledge of the inner workings of the SX will give a better answer (ie post an electrical diagram for I/O pins), but I would not bother to put in resistors.· If momentary undefined pins were an issue, any·SX·design that had certain pins grounded (eg. an active high pushbutton) at startup could be a potential problem.· The same would hold true for the inverse situation (I/O pins held high).·
This would require that all SX designs have tri-stated·I/O lines·at startup.· Can you imagine?
Nate
Post Edited (Nate) : 11/30/2005 11:45:28 AM GMT
fortunately, at power-on or reset, all SX I/O pins are automatically configured as inputs, until the software clears certain bits in the port's TRIS registers. So it is up to your software to make sure that no interconnected I/O pins generate offending states. If this is not the case, I think series limiting resistors are not required.
If you want to add resistors as an additional safety measure, let's assume the worst case: One output pin being low (0V) and the other pin being high (+5V). According to the SX datasheet, the max. allowable sink or source current per I/O pin is 45mA. A resistor of 111Ohm would limit the current to that value. So, a value between 150 and 220Ohm would be fine.
During the relatively long time I'm prototyping SX-based applications, it happened more than once that I had shorts on output pins, and so far, this never destroyed any of my SXes. Seems as if the output circuits are relatively robust, and possibly have some internal current protection. Nevertheless, I don't want to encourage you to ignore output protection .
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Greetings from Germany,
G
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