What is Hi-Z input?

Kenneth Kramer

I know of outputs being in Hi-Z (high impedance mode) but I am not familiar with the term "Hi-Z" input.

Is this a feature related to the internal structure of the SX chip and as such not to the physical behaviour of the port when configured as input?

Would someone care to explain?

Thanks,
Kenneth

PJMonty

Kenneth,

When you put an SX i/O bit to input mode, you are creating a "Hi-Z input", although I don't know if that's an official term. Normally, Hi-Z outputs are used so you can physically connect multiple chip outputs to together (such as in a data bus) without having multiple outputs driving the line and doing nasty things like shorting each other to ground. Well, if you wanted to connect a bunch of SX chip outputs in a bus, you could have them all set to input (even though you wanted outputs) and let the one chip that is driving the line be set to output. This way, all the chips are connected, but only one of them is actively driving the line. The rest, being in input mode, will safely "listen". Hence, you can simulate a Hi-Z output by putting a bit in input mode.

Thanks, PeterM

Kenneth Kramer

Thanks for your reply, Peter.

Say I've 3 SX chips with all B-ports connected together. If chip 1 is driven as output and chip 2 and 3 are driven as Hi-Z inputs, then those 2 chips will listen to what the line driving chip outputs?

As long as only one of these chips are driving the line, then the 2 other chips will safely listen to what the line driving chip has to say.

I think I got picture now.

Please consider the following and tell me·if you agree/disagree:

SX chip 1 SX chip 2 74LS244 buffer Allowed
------------------------------------------
Hi-Z      Output    Output         No
Hi-Z      Output    3-state        Yes
Output    Hi-Z      3-state        Yes
Hi-Z      Hi-Z      3-state        No
Hi-Z      Hi-Z      Output         Yes  

Thanks,

Kenneth

PJMonty

Ken,

Yes, you understand exactly. I also agree with your truth table except for the line that says:

Hi-Z Hi-Z 3-state No

That's actually perfectly legal. It just means that no one is driving the line(s) at that moment.

BTW, the key to all of this is to make sure that your code always switches between input and output correctly. This sort of code has to be debugged carefully since you might have a situation where a bug in the software causes more than one SX to try and drive the line simultaneously.

Thanks, PeterM

James Newton

An undriven line is legal in the sense that it can not cause a short, but that does result in a floating input which can cause problems. And they will be problems of the "strange" and "irreproducable" sort. (see: http://www.sxlist.com/techref/logic/xtrapins.htm ) for more information on that.

If there is a pull up resistor somewhere in there, no problem. Using the internal pullups on the pin is probably just fine as well.

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Chris Savage

It must be some interesting code keeping two SX chips from being opposite state outputs...·

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Chris Savage
Parallax Tech Support
csavage@parallax.com

Guenther Daubach

To protect SX output pins against situations where two offending outputs are tied together, it's an idea to put protection resistors in series. A 220 Ohm resistor, for example limits the output current to about 23 mA assuming that one output is high and the other one is low.

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Greetings from Germany,

G

Kenneth Kramer

So "Hi-Z Hi-Z 3-state No" is actually right or???

Kenneth

PJMonty

Ken,

It should be:

Hi-Z Hi-Z 3-state Yes

...along with the caveat's that Jim and Gunter mentioned about protecting the chips.

Thanks, PeterM

Kenneth Kramer

Peter,

Your help has been invaluable all along. I really appreciate it.

Sincerely,
Kenneth

Kenneth Kramer

Guenther,

Do you mind showing how you calculate the current limiting resistor?

Thanks,
Kenneth

Guenther Daubach

Kenneth,

I have assumed worst case, i.e. one output high (5V) and the other output low (0V). To limit the curren to 20 mA, R = 5V/20mA = 250 Ohm, or for a 220 Ohm resistor, the current would be I = 5V/220Ohm = 22.7 mA.

When you connect two (potential) outputs together, each of the resistors may be half that value, say 120 Ohm each.

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Greetings from Germany,

G

Kenneth Kramer

Chris,

You really disappoint me.

I think your comment is a bit patronizing and it certainly doesn't help for the sake of clearity and the knowledge needed to handle these sensitive devices in a safe way.

I don't know your background but if you're a hardware engineer you probably know more·about the SX chip than most of the members of this forum do.

I wish you would share your experience with the SX processor in a way that we all can benefit from.

Remember this forum exist because all the mebers of this forum has an keen interest in the SX processor and the vast possibities that this brilliant chip can offer once you get to know you its true potentials.

Based on that you may feel like elaborating on what you didn't finish in the first place.

With all respect,
Kenneth

Paul Baker

What Chris is trying to say is you are trying to do something that is quite frowned upon in electrical engineering design, you are trying to design an actively driven multi-drop bi-directional communication line. In my first college course on electrical design (3rd course in the series after the first 2 primer courses) they stress that you never ever do this unless you devise some external handshaking protocol. The reason is Murphy will butt his head in and cause an invalid situation to occur, you can bet your·life on it, it is unavoidable, even if each SX checks the state of the line first if two SX's do this simultaneously then try to assert the line the next cycle a collision (invalid situation) will occur, plus an SX driving the line High cannot be differentiated from a tri-state pullup resistor situation. In a nutshell, don't do this, you will only cause serious problems for yourself (and potentially kill your chips in the process), and trying to devise a software solution (unless you devise an open collector handshaking system) will get you in over your head really quick.

Now with all the negative stuff out of the way, here is what you need to do to accomplish what you are seeking. You need an open-collector setup, this is a system where the line is not actively driven to a high state, it's two states are tri-state output and pull-down. In order to use an SX in this mode, you switch between input and output where the bit is 0 (don't ever drive it 1), so your communication on the line is by switching back and forth between output and input where the output is always a 0. The 244 must also never drive the line high, this setup requires an external pullup resistor on each line to work. Now the SX is a bit peculiar when switching modes and switching from one mode to another requires an intervening operation depending on the value of the output register and the mode register, I don't remember which transistions require this, but read the SX-User's manual very carefully to make sure you adhere to this requirement.

The open collector situation still needs some pretty fancy collision detection software, but it is possible to do, this is what is done in the CDMA protocol.

I'll be happy to further explain anything·you have questions about.

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Post Edited (Paul Baker) : 10/12/2005 4:26:07 PM GMT

pjv

Hi Paul;

I think that in general you are completely correct in using a resistor (or current source) pull-up mechanism for half-duplex party-line communications.

There are however some instances when this may not be adequate, such as very high speed communications; the pull-up is just too slow due to the capacitances on the line.

In those extreme cases then when multi-active operation is required, a good synchronizing techinique with deterministic bit rendering is invaluable, and very reliable.

BUT, it is not for the faint-of-heart; and great care is required.....that Murphy lurks everywhere. I recall a case where I was doing just such a system at 10 Megabits/Sec, and due to a slight timing error in my software, occasionally two opposing transmitters were simultaneously "on" for a few cycles, 40 to 60 nanoSeconds, and that caused a current pulse sufficient to drop my barely adequate power supply enough to reset the processors. Took me a week to track that sucker down...intermittent failures can be a bear to catch if their frequency is low.

Best approach is eliminate tricky things if you can, but don't be afraid of them if you are thorough and careful.

Cheers,

Peter

Paul Baker

Peter, you are correct that a person with substantial experience in both hardware and software design can devise a system of actively driving a bi-directional system. But it is an advanced concept that even the experienced can have difficulties in implementing, and most definitely requires a bullet-proof method of synchronization (handshaking or some method of intrinsic synchronization), and failure to do so creates the nastiest bug of all: the intermittant variety, as you have indicated. The most valuable lesson for any designer starting off is the principle of KISS (keep it simple, stupid). Once you have the simplest method worked out, you can then incrementally incorporate higher levels of complexity, thereby reducing the scope of the problem into a managable level for debugging purposes. (although this is directed to you Peter,·it is a case of·"preaching to the choir", you're very experienced and know these things already, I incorporated it for others reading the post)

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Post Edited (Paul Baker) : 10/12/2005 5:11:12 PM GMT