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probably bizarre question — Parallax Forums

probably bizarre question

NeohavenNeohaven Posts: 13
edited 2005-07-09 22:14 in BASIC Stamp
mad idea... but it's about impossible freaked.gif

could it be possible to interface the bs2 with some memory (EEPROM and RAM) and create a pseudo OS to connect to using a serial port, or is the BS2 too slow?

Comments

  • BeanBean Posts: 8,129
    edited 2005-07-09 02:10
    Depends on what you want the OS to do ???
    Bean.

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    "SX-Video·Module" Now available from Parallax for only $28.95

    http://www.parallax.com/detail.asp?product_id=30012

    Product web site: www.sxvm.com

    "One experiment is worth a thousand theories"
    ·
  • PLJackPLJack Posts: 398
    edited 2005-07-09 03:19
    I had thought about that with the SX.
    By time you got the little OS up and running there would be little to no resources left to do much of anything.
    A whole row of SX'x would make a nice little computer though.

    To answer you question directly, the Stamp would not be too slow. The OS would run at whatever speed is available.
    Although an OS without an interrupt will be a challenge.

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    Perfection in design is not achieved when there is nothing left to add.
    It is achieved when there is nothing left to take away.
  • Ryan ClarkeRyan Clarke Posts: 738
    edited 2005-07-09 03:38
    I have written a RTOS for the Motorolla 68HC11 a while back in school - it didn't do much, but it did work [noparse];)[/noparse]

    I can only imagine how much better it would be to use the SX or Stamps to do something like this

    Ryan
  • NeohavenNeohaven Posts: 13
    edited 2005-07-09 04:50
    PLJack said...
    I had thought about that with the SX.
    By time you got the little OS up and running there would be little to no resources left to do much of anything.
    A whole row of SX'x would make a nice little computer though.

    im talking about interfacing it with some additional EEPROM and RAM (if RAM is possible...)

    i dont want the os to be a full-blown one, just basic stuff, just for the challenge of doing one... which would alerady be hard, and making the OS fit (the kernel) in 2KBytes of memory IS going to be THE challenge... or... maybe not the kernel... just a "boot" type protocol accessing something else, written in an outside data chip (hence the additionnal EEPROM and RAM)... ok totally brainstorming here, but... could it be possible?
  • PLJackPLJack Posts: 398
    edited 2005-07-09 14:54
    Definitely possible.
    Basically the IC would hold a command interrupter for an EEPROM based disk IO.
    Say you have a "list" command. That would send out the contents of the EEPROM through the serial port.
    All the work would be in creating a File table (FAT) for the EEPROM.

    OK, you have me thinking about it again. DAMN you! smile.gif

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    - - - PLJack - - -



    Perfection in design is not achieved when there is nothing left to add.
    It is achieved when there is nothing left to take away.
  • NeohavenNeohaven Posts: 13
    edited 2005-07-09 16:51
    but the fat would list the file, start/end block and read/write attributes?

    so you are telling me i can interface EEPROM with the BS2... but is it possible to interface RAM with it, because..... let's simply say that 32 WORD registers arent enough, if im not mistaken
  • ForrestForrest Posts: 1,341
    edited 2005-07-09 16:56
    EEPROM is easily interfaced to a BS2 - download Nuts and Volts #115 from Parallax's web site. But there's nothing you can do increase the internal RAM on the BS2 module, because that's internal to the Microchip PIC16C57 that runs the BS2.
  • NeohavenNeohaven Posts: 13
    edited 2005-07-09 17:19
    i mean.... a computer's CPU has it's cache, and it's own registers... like the PICMicro chip on the BS2... but a computer's RAM is interfaced externally from the cpu, which exchanges it's registers to get it's variables and program data, as far as i remember... so would it be possible to use RAM chips.... SRAM or DRAM... DRAM would need something to refresh it though, is there any... "DRAM-refresh" chip? and also... how does SRAM work?
  • southernbobsouthernbob Posts: 34
    edited 2005-07-09 18:52
    I have been working on a program (off & on) for awhile, while not a mini-OS it is more of,
    I guess, a control program (learning program for me).

    The Hardware:
    ···· Basic Stamp BS2
    ···· PCJR Keyboard (IR wireless /w receiver module)
    ····4x16 parallel LCD with serial conversion chip
    ··· ·EMIC Text-to-speech module
    ···· filter for the EMIC audio out
    ···· DS1302 real time clock with battery backup
    ···· C32· I2C EEPROM····
    ···· 74HC595 with 8 outputs (/w LED's)

    Functions:
    ··-· BS2 handles the translation of the keycodes values to ones used by the program.
    ···· ·The SERIN for reading the keycodes· has an 80 msec timeout so that the keys
    ····· are caught on the 'fly'. This results in sometime getting the 'make' code
    ····· and sometimes getting the 'break' code from the keystroke, logic in the program
    ····· tries to handle that.· In the event·that a key is garbled a message is spoken by
    ····· EMIC to re-enter the key. To go along with this, there is a function to speak the
    ····· key that is entered. This is controlled by a 'switch' function from the keyboard.
    ····· If it is turned off then·the speech is replaced by a tone as a key is pressed. The
    ····· keys such as CAPS & CNTL,etc are used for commands·to the program.

    -· DS1302· RTC- the time is displayed on the LCD, when the minute changes then
    ···· ·the LCD is updated. Another function·is to have the·· time spoken every 15 minutes
    ······by EMIC. This can be turned off by another 'software switch' from the·keyboard.
    ···· ·Another switch function is to set 12 or 24 hour mode. The DS1302 ram is used to
    ···· ·contain three 6 bit·counters. Each counter can count to 999,999 and are kept in
    ······BCD values for easy translation to ASCII. Only· one is currently used. As the minute
    ···· ·changes over, 1 is added to counter 1 (just for test purposes). Each counter
    ···· ·can be selected from the keyboard for display on the LCD· or can be reset. Since
    ····· the DS1302 has battery· backup both the counters and clock time are preserved
    ···· ·during a power off. The date function is not used.

    - C32 EEPROM - this for now, contains messages that took up space in the BS2
    ····· EEPROM. Right now the messages· can· be selected from the keyboard to be
    ····· displayed on the LCD. A program section can also cause a message to be
    ······selected and displayed. A subfunction is to sound a tone when a message is
    ····· displayed.·Another program was·used to write the messages to the C32 EEPROM.

    - 74HC595 - this has 8 outputs that can be used to control 'things'.· Each ouput
    ···· has a LED to indicate whether it is· active or not. Each output can be controlled
    ··· ·(On/Off) from the keyboard.

    - Other functions - Keyboard to LCD - this allows a short message to be entered
    ·· ·on the keyboard for display on the LCD.··· This was used to send commands/data
    ··· to a PC via a serial link(not the programming port). The PC code has been
    ·· removed for now to make room· for other functions (will be put back in when I
    ·· ·move to a 'bigger' Stamp).
    ·· The·code in the PC was· a custom DOS··assembly···program.· This LCD·area
    ·· also can be used to send a short message·to a serial printer (PCJR serial printer,
    ·· not connected at present).
    ·· Software switches - the status of these switches are displayed on the LCD.
    ·· ·Four can be controlled from the keyboard·three from inside the program and
    ·· ·one by an external switch.
    ·· EMIC abbreviations·were added to the EMIC user flash ram·for the keyboard
    ·· command keys to be used when the 'speak-the-key' function is enabled.
    ·· LCD Display
    ························ · line 1 - displays the selected EEPROM message
    ···························line 2 - displays the keyboard to LCD message
    ···························line 3 - displays the selected counter value
    ···························line 4 - displays the·'switches' on the left and the time on the right···························


    Summary - what does this program do,·mostly nothing. It is a learning tool for me
    ·· ·on how to interface to various hardware· units and doesn't really perform any function
    ··· such as an alarm system or control relays etc. Before I add anything else
    ··· I have alot of 'cleanup' to do in the program, since I added and deleted stuff.· I still
    ·· ·have 156 bytes of storage and·1 word of ram to play with, probably more after I do the cleanup.

    ··· My thanks to the authors of the Nuts & Volts articles for their code that I was able
    ·· ·to adapt to my program.
  • Ryan ClarkeRyan Clarke Posts: 738
    edited 2005-07-09 19:10
    What you aren't going to have is a memory bus as fast as you are going to need. Generally in a computer you have cache which is 'on chip' memory- then you have ram (now you have different levels of cache L1, L2, etc)- When info that is needed by the CPU isn't in cache, then the ram gets checked. If it is not in ram, then it needs to be read from the mass storage (usually the hard drive)- When you hear about 'pages' they are talking about the data stored at these levels...a page fault is when something needed is not there, and a new block needs to be stored....in program code (unless it is a jump, branch, etc) it is efficient to assume that code that is close to other intsructions will be executed soon, so 'pages' of info are fetched. (Consider looping, sequential code execution, etc- generally the instructions that are close together get executed in some linear fashion...and if not, looping also causes the 'near' code to be executed over and over)- The fewer 'faults' you have the faster your code/system/program runs....

    The original reason for the different levels of memory was two-fold: cache/ram was expensive (relative to the huge hard disks/floppies)- the 'closer' to the CPU a form of memory storage was the faster it needed to be (to take advantage of the processor speed)- there have been cache/ram only computers made (really expensive)- I think CRAY made one...

    Ryan
  • NeohavenNeohaven Posts: 13
    edited 2005-07-09 19:39
    ok bt is there a way to make that same system like.....

    cache - internal RAM
    RAM - SRAM or DRAM
    "permanent" storage - EEPROM chip

    and hey dont forget.... the 8086 was real slow at executing basic LOL

    i think the PIC, hence the BS2 is fast enough (and easy enough to program) for a guy like me to be able to do it... but the thing is.... do you guys think it's possible?

    and could the main program (Kernel in BS2's EEPROM) get some files that have been transferred from a computer to an outside EEPROM chip to execute it? (tokenized instructions that CAN be run by the BS2), or should it either swap the kernel out and get that new program instead to run it?
  • ForrestForrest Posts: 1,341
    edited 2005-07-09 20:51
    I'd say this is a very difficult project to do on a BS2 - after all it will only execute 4,000 Basic instructions per second and it won't do interrupts. I think you'll have better luck with the Ubicom SX chip. The XGameStation is an example of a SX52 based microcomputer - see www.xgamestation.com/. You can download Chapter 11 of building your own game system on XGameStation's site and design/build your own version using the SX48/52 prototype board's sold here for $10
  • Ryan ClarkeRyan Clarke Posts: 738
    edited 2005-07-09 22:14
    You can't beat the SX for price/speed....and with the new carrier boards being sold at cost, who could ask for more?

    Ryan
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