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Understanding Signals-Chapter 5 page 69 Oscilloscope Clock/Data interpretation — Parallax Forums

Understanding Signals-Chapter 5 page 69 Oscilloscope Clock/Data interpretation

Bob GagnonBob Gagnon Posts: 8
edited 2005-05-01 04:10 in Learn with BlocklyProp
The book says (page 68, last paragraph) the data is read on the rising edge of the clock signal. At that instant of time...

I can't see why the bit values are not 00101000 instead of what the book says, 01010000. If the leading edge of the clock determines when the data are read, than it seems to me that the 2nd bit (from left to right) would be a zero because the data is at zero on the leading clock edge. And for the same reason the 3rd bit is a 1, 4th bit a zero, 5th bit a 1, and the remaining 3 bits are all 0. What am I missing here...thanks for any help. bob gagnon

Comments

  • dandreaedandreae Posts: 1,375
    edited 2005-04-27 15:27
    If you look at the individual "Clock line" cycles and compare them to the "Data line" cycles you will see the reasoning for the values.· On the second rising edge·of the clock line cycle, you'll notice that the lower part of the cycle matches up with the high edge of the·data line cycle.

    Dave

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    ·
  • Bob GagnonBob Gagnon Posts: 8
    edited 2005-04-27 17:09
    Thanks Dave, I see what you mean. It's just that, to me, what you call the second rising edge of the clock cycle is actually the falling edge. I guess its just a matter of misunderstanding, on my part, the terminology as to what the falling edge is called. If I'm wrong about that please correct me. Bob Gagnon
  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2005-04-27 18:45
    Bob,

    ·· Yes, it is the falling edge of the clock.· Dave was merely trying to explain it more in laymans terms so that you could understand why the values differed from what you expected.· It kind of looked like you may have thought they were part of the next clock cycle.

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  • Bob GagnonBob Gagnon Posts: 8
    edited 2005-04-27 23:28
    Thanks Chris,

    I have been experimenting with the Shiftin instruction's msbpost and msbpre functions. That also helped me understand whats going on here. With the scope I could see the difference between sampling data bits before and after the clock pulse.
  • John KauffmanJohn Kauffman Posts: 653
    edited 2005-05-01 01:55
    That figure threw me for a while & I'm finding takes time to explain to students. I'd say it should be flagged for revision in next edition.
  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2005-05-01 02:00
    John,

    ·· I'm sorry of there is any confusion.· In many microprocessor/microcontroller systems you will have different chips that are edge triggered as opposed to level triggered.· On the edge triggered devices they can be triggered on the rising edge, or the falling edge of a signal.· In this example, the data is available on the falling edge of the clock signal.· I hope there's no confusion from the book.· If so we can pass the information along to the proper channels.· But I do hope I was able to clear things up a bit.



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  • Aristides AlvarezAristides Alvarez Posts: 486
    edited 2005-05-01 04:10
    Hello Bob and John,

    Revising Understanding Signals is already in our queue, so I can easily flag this issue to our editor.

    The revision will cover the oscilloscope name change (from OPTAscope to Parallax USB Oscilloscope) and also a new software version that we're currently developing.

    We can add further explanation on this specific issue.

    Thanks to all for the feedback, because it helps us improve our books.
    Each revision is improved with all the comments and suggestions we receive through our forums and directly by email to editor@parallax.com.

    Thanks and keep sending your feedback!

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    aalvarez@parallax.com
    Parallax, Inc. www.parallax.com
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