Need help designing 2.7V to 5V interface

Paul Baker

I am interfacing the SX operating at 5V with a 2.7V SPI device with a max operating frequency of 20MHz, the SX is the master. I plan on using a voltage divider for the MOSI and Clock signals to convert 5V to 2.7V. But I am faced with a slight dilemma for the MISO line. I want a very small circuit because board real-estate is at a premium, so I don't want to go with a level shifter chip. Ordinarily I would design something like the following circuit:

············· 5V
···············|
·············· R
·············· |____ SX MISO
·············· |
Slave MISO ---npn or nmos
·············· |
··············GND

But this also inverts the signal, not a super-critical issue, since I can rewrite the SPI interface inverting all the MISO bits. But I cannot think of a similar simple circuit which will have a non inverting output, can anyone think of such a circuit? Additionally, given the parameters I have provided, can anyone suggest a particular transistor to use in the above circuit? (The transistor should be surface mount or have a surface mount equivalent) As you can see it is a capacitive load where the capacitance is the SX pin configured as an input. I cannot find on any of the data sheets what's the capacitance of an SX pin, so the circuit will have to be overdesigned. Also any suggestion of a ballpark for the resistor value?

Paul

Post Edited (Paul Baker) : 1/14/2005 4:12:09 PM GMT

Jon Williams

Perhaps I'm being too simplistic here, but will this work?:

Slave MISO

---

+

---

4.7K

---

SX MISO
··············· |
···············4.7K
················|
·············· Vss

▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Jon Williams
Applications Engineer, Parallax
Dallas, TX· USA

Paul Baker

With an output high of 2.7V of the slave MISO, even with the SX input set to CMOS wouldn't that only be 0.2V above the switching level of the 5V SX? Its been awhile since I've studied the issue, but I would think that would be a pretty bad noise margin and would lead to read errors in a noisey environment. It would also reduce the duty cycle of a signal level high (this may not be an issue if the slew rate is high enough).

Paul

PS thanks for responding, I figured you'd be able to help me if anyone could. I read your patents, my parents could use your swivel intake patent, they live on a lake that is only weakly fed by a spring. When there is very heavy rain, the silt level of the lake rises and clogs the intake to thier irrigation system, causing my mom to swim out with a shovel and dig it out. During dry and hot periods the lake level decreases so far that the intake is exposed to the air (at the time they need to irrigate the most), though your invention wouldn't help for the second situation. They have extended the pipe twice, but without fail the frequent and increasingly severe Florida droughts prove thier expenditure was in vein.

Paul Baker

As I was commuting home it dawned on me what you are trying to do with the circuit, by setting up a current through the bottom resistor, establishing· (theoretically) a higher voltage at the SX pin. Clever concept, but nodal analysis of the circuit shows the current flowing through the resistor leading to the SX to be an unknown. But assuming the input of the SX to be a high impedence, nearly all of the current flowing from the slave will source into the grounded resistor. And which way the current flows through the resistor connected to the SX pin can be in either direction (I could probably figure it out by examining the source and sink currents but I don't think the result will be quite satisfactory)

With the pullup resistor activated on the SX (the User manual gives an approximate resistance of 20k), the voltage at the SX pin can be calculated by the following circuit equivalent:

·········· 5V
··········· |
········· 20k
··········· |____SX Pin
··········· |
········· 4.7k
··········· |
Slave___|(2.7V)
··········· |
··········4.7k
··········· |
·········· 0V

The current flowing through·the top two resistors is 93uA (2.3V/24.7KOhm) producing a voltage of 3.1V at the input, better but not by much. An additional complication is that this is steady state analysis,·with a switching speed of 20MHz, charging and discharging the input capacitance of the SX pin will consume·a fair amount of the 93uA causing the actual voltage to be even lower, for this reason increasing the two resistor values will not improve the situation because there would be even less current and the current consumed by the·SX pin will be a greater share of the total current.

However·after thinking of your example I think I may have come up with another·idea, using current mirrors. Ill need to draw up the circuit and analyse it. Ill post my results when Im done.

Paul

KenM

One possible solution with minimal external hardware if you have SX i/o pins available is to use the SX analog comparitor with output enabled.

Assuming the slave MISO outputs swing near the rails, and the SX analog comparitor is fast enough a simple divider network splitting the 5 volts to 1.5 volts·into one of the comparitor inputs, or simply two diode drops above ground to the reference input, MISO to the other input, then enable and sense the output of the comparitor.

Tracy recently posted a wealth of data on the comparitor speed.

+5v
R
R
R
R

---

SX comparitor reference input
diode
diode
ground


???

Ken

Post Edited (KenM) : 1/15/2005 6:10:47 AM GMT

Paul Baker

Current mirror is inverting too.

Ken, interesting idea, I think it·will work. The application requires so many I/O that I have to add external logic for expansion (I have >80 signal lines ), but I think I can spare an additional pin on the SX, and the midpoint of·2.7V is conveniently two diode drops (fine tunable via the resistor). This will require rerouting the SPI over to the B port. It is not critical to operate at 20MHz, this is just the maximum speed of the device. It will be used as a backstore so there are no timing constraints that must be adhered to.

Paul

KenM

Paul,

Just a couple of small notes.

You mentioned freeing up an extra pin on the SX. The comparitor config I suggested will use 3 SX pins.

Ken

Paul Baker

Why not set the reference voltage to be ~1.4V using a couple diodes and a resistor, then feeding the MISO line into the comparator and sampling the comparator result? 5V as the source·for the reference shouldn't pose an issue, just use a value of R to set the right current. I guess I don't understand where the third pin is being used. I haven't used the comparator function yet, there is a comparator out? If so can it be overridden or disabled?


Paul

Just read the spec, I think I can set /CMP_EN to 0 and /CMP_OE to 1 (disable output)

Post Edited (Paul Baker) : 1/15/2005 6:52:27 AM GMT

KenM

Paul,

Yeah, some brain fade on my part......

The comparitor obviously uses two i/o pins. The user has the option of turning on the output (third pin), or simply make a decision based on a bit set or clear in the W register.

Ken

Code from Guenthers book (I think)

;This SX28 code demonstrates setup of the on-board comparator.

;This code is written for the SX28 with a date code of AB9921AA (or later)
;and requires the SXKEY28L.exe software for assembly and programming.

··DEVICE·SX28L,OSC4MHZ,TURBO
··RESET·Start
··FREQ 4_000_000

Start
··;Comparator Configuration
··MODE·$08··;Set Mode to allow Comparator configuration
··MOV·!rb,#%00000000·;Set comparator on and result-output enabled
··MODE ·$0F··;Set Mode to allow Direction configuration
··MOV·!rb,#%11111110·;Set port B bit 0 output, bits 1-7 to input

Main
··MODE·$08
··MOV·!rb,#$00
··jmp·Main··;At this point, W bit 0 holds result of comparator
·····;and port B bit 0 outputs the result as well.